#undef CONFIG_FSL_DDR_INTERACTIVE
#undef CONFIG_DDR_ECC /* only for ECC DDR module */
-#define CONFIG_DDR_DLL /* possible DLL fix needed */
+#define CONFIG_SYS_FSL_ERRATUM_DDR_MSYNC_IN /* possible DLL fix needed */
#define CONFIG_DDR_2T_TIMING /* Sets the 2T timing bit */
#define CONFIG_MEM_INIT_VALUE 0xDeadBeef