#ifndef __CONFIG_H
#define __CONFIG_H
-#define CONFIG_MX51 /* must be set before including imx-regs.h */
-
-#include <asm/sizes.h>
+#include <linux/kconfig.h>
+#include <linux/sizes.h>
#include <asm/arch/imx-regs.h>
/*
#define CONFIG_DISPLAY_BOARDINFO
#define CONFIG_BOARD_LATE_INIT
#define CONFIG_BOARD_EARLY_INIT_F
+#define CONFIG_SYS_GENERIC_BOARD
#if CONFIG_SYS_CPU_CLK == 600
#define TX51_MOD_PREFIX "6"
#endif
/* LCD Logo and Splash screen support */
-#define CONFIG_LCD
#ifdef CONFIG_LCD
#define CONFIG_SPLASH_SCREEN
#define CONFIG_SPLASH_SCREEN_ALIGN
#define CONFIG_VIDEO_IPUV3
-#define CONFIG_IPUV3_CLK 200000000
+#define CONFIG_IPUV3_CLK 133000000
#define CONFIG_LCD_LOGO
-#define LCD_BPP LCD_COLOR24
+#define LCD_BPP LCD_COLOR32
#define CONFIG_CMD_BMP
#define CONFIG_VIDEO_BMP_RLE8
#endif /* CONFIG_LCD */
/*
* Memory configuration options
*/
-#ifndef CONFIG_SYS_SDRAM_CLK
-#define CONFIG_SYS_SDRAM_CLK 166
-#endif
#define PHYS_SDRAM_1 0x90000000 /* Base address of bank 1 */
#define PHYS_SDRAM_1_SIZE SZ_128M
#if CONFIG_NR_DRAM_BANKS > 1
#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM_1 /* Memtest start address */
#define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM_1 + SZ_4M) /* 4 MB RAM test */
#define CONFIG_SYS_SDRAM_CLK 166
-#define CONFIG_SYS_CLKTL_CBCDR 0x01e35180
+#define CONFIG_SYS_CLKTL_CBCDR 0x01e35100
/*
* U-Boot general configurations
*/
#define CONFIG_SYS_LONGHELP
-#define CONFIG_SYS_PROMPT "TX51 U-Boot > "
#define CONFIG_SYS_CBSIZE 2048 /* Console I/O buffer size */
#define CONFIG_SYS_PBSIZE \
(CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
#define CONFIG_CMDLINE_EDITING /* Command history etc */
#define CONFIG_SYS_64BIT_VSPRINTF
-#define CONFIG_SYS_NO_FLASH
/*
* Flattened Device Tree (FDT) support
*/
-#define CONFIG_OF_LIBFDT
-#define CONFIG_OF_BOARD_SETUP
-#define CONFIG_SYS_FDT_ADDR (PHYS_SDRAM_1 + SZ_16M)
/*
* Boot Linux
#define CONFIG_BOOTARGS "init=/linuxrc console=ttymxc0,115200 ro debug panic=1"
#define CONFIG_BOOTCOMMAND "run bootcmd_${boot_mode} bootm_cmd"
#define CONFIG_LOADADDR 94000000
+#define CONFIG_FDTADDR 91000000
#define CONFIG_SYS_LOAD_ADDR _pfx(0x, CONFIG_LOADADDR)
+#define CONFIG_SYS_FDT_ADDR _pfx(0x, CONFIG_FDTADDR)
#define CONFIG_U_BOOT_IMG_SIZE SZ_1M
-#define CONFIG_HW_WATCHDOG
/*
* Extra Environment Settings
*/
+#ifdef CONFIG_TX51_UBOOT_NOENV
+#define CONFIG_EXTRA_ENV_SETTINGS \
+ "autostart=no\0" \
+ "autoload=no\0" \
+ "baseboard=stk5-v3\0" \
+ "bootdelay=-1\0" \
+ "fdtaddr=" xstr(CONFIG_FDTADDR) "\0" \
+ "mtdids=" MTDIDS_DEFAULT "\0" \
+ "mtdparts=" MTDPARTS_DEFAULT "\0"
+#else
#define CONFIG_SYS_CPU_CLK_STR xstr(CONFIG_SYS_CPU_CLK)
#define CONFIG_EXTRA_ENV_SETTINGS \
"autostart=no\0" \
"baseboard=stk5-v3\0" \
- "bootargs_jffs2=run default_bootargs;set bootargs ${bootargs}" \
+ "bootargs_jffs2=run default_bootargs" \
+ ";setenv bootargs ${bootargs}" \
" root=/dev/mtdblock3 rootfstype=jffs2\0" \
- "bootargs_mmc=run default_bootargs;set bootargs ${bootargs}" \
+ "bootargs_mmc=run default_bootargs;setenv bootargs ${bootargs}" \
" root=/dev/mmcblk0p2 rootwait\0" \
- "bootargs_nfs=run default_bootargs;set bootargs ${bootargs}" \
+ "bootargs_nfs=run default_bootargs;setenv bootargs ${bootargs}" \
" root=/dev/nfs nfsroot=${nfs_server}:${nfsroot},nolock" \
" ip=dhcp\0" \
- "bootargs_ubifs=run default_bootargs;set bootargs ${bootargs}" \
+ "bootargs_ubifs=run default_bootargs" \
+ ";setenv bootargs ${bootargs}" \
" ubi.mtd=rootfs root=ubi0:rootfs rootfstype=ubifs\0" \
- "bootcmd_jffs2=set autostart no;run bootargs_jffs2" \
+ "bootcmd_jffs2=setenv autostart no;run bootargs_jffs2" \
";nboot linux\0" \
- "bootcmd_mmc=set autostart no;run bootargs_mmc" \
+ "bootcmd_mmc=setenv autostart no;run bootargs_mmc" \
";fatload mmc 0 ${loadaddr} uImage\0" \
- "bootcmd_nand=set autostart no;run bootargs_ubifs" \
+ "bootcmd_nand=setenv autostart no;run bootargs_ubifs" \
";nboot linux\0" \
- "bootcmd_net=set autoload y;set autostart n;run bootargs_nfs" \
+ "bootcmd_net=setenv autoload y" \
+ ";setenv autostart n;run bootargs_nfs" \
";dhcp\0" \
"bootm_cmd=bootm ${loadaddr} - ${fdtaddr}\0" \
"boot_mode=nand\0" \
"cpu_clk=" CONFIG_SYS_CPU_CLK_STR "\0" \
- "default_bootargs=set bootargs " CONFIG_BOOTARGS \
+ "default_bootargs=setenv bootargs " CONFIG_BOOTARGS \
" ${append_bootargs}\0" \
- "fdtaddr=91000000\0" \
- "fdtsave=nand erase.part dtb" \
+ "fdtaddr=" xstr(CONFIG_FDTADDR) "\0" \
+ "fdtsave=fdt resize;nand erase.part dtb" \
";nand write ${fdtaddr} dtb ${fdtsize}\0" \
"mtdids=" MTDIDS_DEFAULT "\0" \
"mtdparts=" MTDPARTS_DEFAULT "\0" \
"otg_mode=device\0" \
"touchpanel=tsc2007\0" \
"video_mode=VGA\0"
+#endif /* CONFIG_TX51_UBOOT_NOENV */
#define MTD_NAME "mxc_nand"
#define MTDIDS_DEFAULT "nand0=" MTD_NAME
-#define CONFIG_FDT_FIXUP_PARTITIONS
-
-/*
- * U-Boot Commands
- */
-#include <config_cmd_default.h>
-#define CONFIG_CMD_CACHE
-#define CONFIG_CMD_MMC
-#define CONFIG_CMD_NAND
-#define CONFIG_CMD_MTDPARTS
-#define CONFIG_CMD_BOOTCE
-#define CONFIG_CMD_TIME
-#define CONFIG_CMD_MEMTEST
/*
* Serial Driver
*/
#define CONFIG_MXC_UART
#define CONFIG_MXC_UART_BASE UART1_BASE
-#define CONFIG_MXC_GPIO
#define CONFIG_BAUDRATE 115200 /* Default baud rate */
#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, }
#define CONFIG_SYS_CONSOLE_INFO_QUIET
+/*
+ * GPIO driver
+ */
+#define CONFIG_MXC_GPIO
+
/*
* Ethernet Driver
*/
-#define CONFIG_FEC_MXC
#ifdef CONFIG_FEC_MXC
#define IMX_FEC_BASE FEC_BASE_ADDR
-#define CONFIG_FEC_MXC_PHYADDR 0x1f
-#define CONFIG_PHYLIB
-#define CONFIG_PHY_SMSC
-#define CONFIG_MII
#define CONFIG_FEC_XCV_TYPE MII100
-#define CONFIG_GET_FEC_MAC_ADDR_FROM_IIM
-#define CONFIG_CMD_MII
-#define CONFIG_CMD_DHCP
-#define CONFIG_CMD_PING
-/* Add for working with "strict" DHCP server */
-#define CONFIG_BOOTP_SUBNETMASK
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_DNS
#endif
/*
* NAND flash driver
*/
#ifdef CONFIG_CMD_NAND
-#define CONFIG_MTD_DEVICE
-#define CONFIG_ENV_IS_IN_NAND
-#define CONFIG_NAND_MXC
#define CONFIG_MXC_NAND_REGS_BASE NFC_BASE_ADDR_AXI
#define CONFIG_MXC_NAND_IP_REGS_BASE NFC_BASE_ADDR
#define CONFIG_MXC_NAND_HWECC
-#define CONFIG_CMD_NAND_TRIMFFS
-#define CONFIG_SYS_NAND_MAX_CHIPS 1
-#define CONFIG_SYS_MAX_NAND_DEVICE 1
+#define CONFIG_SYS_NAND_MAX_CHIPS 0x1
+#define CONFIG_SYS_MAX_NAND_DEVICE 0x1
#define CONFIG_SYS_NAND_5_ADDR_CYCLE
-#define CONFIG_SYS_NAND_USE_FLASH_BBT
#ifdef CONFIG_ENV_IS_IN_NAND
#define CONFIG_ENV_OVERWRITE
#define CONFIG_ENV_OFFSET CONFIG_U_BOOT_IMG_SIZE
#define CONFIG_ENV_RANGE 0x60000
#endif
#define CONFIG_SYS_NAND_BASE 0x00000000
-#define CONFIG_CMD_ROMUPDATE
#endif /* CONFIG_CMD_NAND */
/*
* MMC Driver
*/
-#ifdef CONFIG_CMD_MMC
-#ifndef CONFIG_ENV_IS_IN_NAND
-#define CONFIG_ENV_IS_IN_MMC
-#endif
-#define CONFIG_MMC
-#define CONFIG_GENERIC_MMC
-#define CONFIG_FSL_ESDHC
+#ifdef CONFIG_FSL_ESDHC
#define CONFIG_SYS_FSL_ESDHC_ADDR 0
-#define CONFIG_DOS_PARTITION
#define CONFIG_CMD_FAT
#define CONFIG_FAT_WRITE
#define CONFIG_CMD_EXT2