#ifndef __CONFIG_H
#define __CONFIG_H
-#define CONFIG_MX53 /* must be set before including imx-regs.h */
-
-#include <asm/sizes.h>
+#include <linux/sizes.h>
#include <asm/arch/imx-regs.h>
/*
* Ka-Ro TX53 board - SoC configuration
*/
-#define CONFIG_TX53 /* TX53 SoM */
#define CONFIG_SYS_MX5_IOMUX_V3
#define CONFIG_MXC_GPIO /* GPIO control */
#define CONFIG_SYS_MX5_HCLK 24000000
#define CONFIG_DISPLAY_BOARDINFO
#define CONFIG_BOARD_LATE_INIT
#define CONFIG_BOARD_EARLY_INIT_F
+#define CONFIG_SYS_GENERIC_BOARD
/* LCD Logo and Splash screen support */
-#define CONFIG_LCD
#ifdef CONFIG_LCD
#define CONFIG_SPLASH_SCREEN
#define CONFIG_SPLASH_SCREEN_ALIGN
#define CONFIG_VIDEO_IPUV3
#define CONFIG_IPUV3_CLK 200000000
#define CONFIG_LCD_LOGO
-#define LCD_BPP LCD_COLOR24
+#define LCD_BPP LCD_COLOR32
#define CONFIG_CMD_BMP
#define CONFIG_VIDEO_BMP_RLE8
#endif /* CONFIG_LCD */
/*
* Memory configuration options
*/
+#ifndef CONFIG_SYS_SDRAM_SIZE
+#define CONFIG_SYS_SDRAM_SIZE (SZ_512M * CONFIG_NR_DRAM_BANKS)
+#endif
+
#define PHYS_SDRAM_1 0x70000000 /* Base address of bank 1 */
-#define PHYS_SDRAM_1_SIZE SZ_512M
+#define PHYS_SDRAM_1_SIZE (CONFIG_SYS_SDRAM_SIZE / CONFIG_NR_DRAM_BANKS)
#if CONFIG_NR_DRAM_BANKS > 1
#define PHYS_SDRAM_2 0xb0000000 /* Base address of bank 2 */
-#define PHYS_SDRAM_2_SIZE SZ_512M
-#define TX53_MOD_SUFFIX "1"
-#else
-#define TX53_MOD_SUFFIX "0"
+#define PHYS_SDRAM_2_SIZE PHYS_SDRAM_1_SIZE
#endif
#define CONFIG_STACKSIZE SZ_128K
#define CONFIG_SYS_MALLOC_LEN SZ_8M
#define CONFIG_CMDLINE_EDITING /* Command history etc */
#define CONFIG_SYS_64BIT_VSPRINTF
-#define CONFIG_SYS_NO_FLASH
/*
* Flattened Device Tree (FDT) support
*/
-#define CONFIG_OF_LIBFDT
-#define CONFIG_OF_BOARD_SETUP
-#define CONFIG_SYS_FDT_ADDR (PHYS_SDRAM_1 + SZ_16M)
/*
* Boot Linux
#define CONFIG_BOOTARGS "init=/linuxrc console=ttymxc0,115200 ro debug panic=1"
#define CONFIG_BOOTCOMMAND "run bootcmd_${boot_mode} bootm_cmd"
#define CONFIG_LOADADDR 78000000
+#define CONFIG_FDTADDR 71000000
#define CONFIG_SYS_LOAD_ADDR _pfx(0x, CONFIG_LOADADDR)
+#define CONFIG_SYS_FDT_ADDR _pfx(0x, CONFIG_FDTADDR)
#define CONFIG_U_BOOT_IMG_SIZE SZ_1M
-#define CONFIG_HW_WATCHDOG
+#ifndef CONFIG_SYS_LVDS_IF
+#define DEFAULT_VIDEO_MODE "VGA"
+#else
+#define DEFAULT_VIDEO_MODE "HSD100PXN1"
+#endif
/*
* Extra Environment Settings
"cpu_clk=800\0" \
"default_bootargs=set bootargs " CONFIG_BOOTARGS \
" ${append_bootargs}\0" \
- "fdtaddr=71000000\0" \
- "fdtsave=fdt resize;nand erase.part dtb" \
+ "fdtaddr=" xstr(CONFIG_FDTADDR) "\0" \
+ "fdtsave=fdt resize;nand erase.part dtb" \
";nand write ${fdtaddr} dtb ${fdtsize}\0" \
"mtdids=" MTDIDS_DEFAULT "\0" \
"mtdparts=" MTDPARTS_DEFAULT "\0" \
"nfsroot=/tftpboot/rootfs\0" \
"otg_mode=device\0" \
"touchpanel=tsc2007\0" \
- "video_mode=VGA\0"
+ "video_mode=" DEFAULT_VIDEO_MODE "\0"
#define MTD_NAME "mxc_nand"
#define MTDIDS_DEFAULT "nand0=" MTD_NAME
-#define CONFIG_FDT_FIXUP_PARTITIONS
-
-/*
- * U-Boot Commands
- */
-#include <config_cmd_default.h>
-#define CONFIG_CMD_CACHE
-#define CONFIG_CMD_MMC
-#define CONFIG_CMD_NAND
-#define CONFIG_CMD_MTDPARTS
-#define CONFIG_CMD_BOOTCE
-#define CONFIG_CMD_TIME
-#define CONFIG_CMD_I2C
-#define CONFIG_CMD_MEMTEST
/*
* Serial Driver
/*
* Ethernet Driver
*/
-#define CONFIG_FEC_MXC
#ifdef CONFIG_FEC_MXC
#define IMX_FEC_BASE FEC_BASE_ADDR
#define CONFIG_FEC_MXC_PHYADDR 0
-#define CONFIG_PHYLIB
-#define CONFIG_PHY_SMSC
-#define CONFIG_MII
#define CONFIG_FEC_XCV_TYPE MII100
-#define CONFIG_GET_FEC_MAC_ADDR_FROM_IIM
-#define CONFIG_CMD_MII
-#define CONFIG_CMD_DHCP
-#define CONFIG_CMD_PING
-/* Add for working with "strict" DHCP server */
-#define CONFIG_BOOTP_SUBNETMASK
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_DNS
#endif
/*
* I2C Configs
*/
#ifdef CONFIG_CMD_I2C
-#define CONFIG_HARD_I2C
#define CONFIG_I2C_MXC
#define CONFIG_SYS_I2C_BASE I2C1_BASE_ADDR
-#define CONFIG_SYS_I2C_MX6_PORT1
#define CONFIG_SYS_I2C_SPEED 400000
#define CONFIG_SYS_I2C_SLAVE 0x34
#endif
* NAND flash driver
*/
#ifdef CONFIG_CMD_NAND
-#define CONFIG_MTD_DEVICE
-#define CONFIG_ENV_IS_IN_NAND
-#define CONFIG_NAND_MXC
#define CONFIG_MXC_NAND_REGS_BASE NFC_BASE_ADDR_AXI
#define CONFIG_MXC_NAND_IP_REGS_BASE NFC_BASE_ADDR
#define CONFIG_MXC_NAND_HWECC
-#define CONFIG_CMD_NAND_TRIMFFS
-#define CONFIG_SYS_NAND_MAX_CHIPS 1
-#define CONFIG_SYS_MAX_NAND_DEVICE 1
+#define CONFIG_SYS_NAND_MAX_CHIPS 0x1
+#define CONFIG_SYS_MAX_NAND_DEVICE 0x1
#define CONFIG_SYS_NAND_5_ADDR_CYCLE
-#define CONFIG_SYS_NAND_USE_FLASH_BBT
#ifdef CONFIG_ENV_IS_IN_NAND
#define CONFIG_ENV_OVERWRITE
#define CONFIG_ENV_OFFSET CONFIG_U_BOOT_IMG_SIZE
#define CONFIG_ENV_RANGE 0x60000
#endif
#define CONFIG_SYS_NAND_BASE 0x00000000
-#define CONFIG_CMD_ROMUPDATE
#endif /* CONFIG_CMD_NAND */
/*
* MMC Driver
*/
-#ifdef CONFIG_CMD_MMC
-#ifndef CONFIG_ENV_IS_IN_NAND
-#define CONFIG_ENV_IS_IN_MMC
-#endif
-#define CONFIG_MMC
-#define CONFIG_GENERIC_MMC
-#define CONFIG_FSL_ESDHC
+#ifdef CONFIG_FSL_ESDHC
#define CONFIG_SYS_FSL_ESDHC_ADDR 0
-#define CONFIG_DOS_PARTITION
#define CONFIG_CMD_FAT
#define CONFIG_FAT_WRITE
#define CONFIG_CMD_EXT2