#ifndef __CONFIG_H
#define __CONFIG_H
-#include <asm/arch/imx-regs.h>
#define CONFIG_MX51 /* in a mx51 */
-#define CONFIG_L2_OFF
+#define CONFIG_SYS_TEXT_BASE 0x97800000
+
+#include <asm/arch/imx-regs.h>
#define CONFIG_SYS_MX5_HCLK 24000000
#define CONFIG_SYS_MX5_CLK32 32768
#define CONFIG_DISPLAY_BOARDINFO
#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
-#define CONFIG_REVISION_TAG
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_INITRD_TAG
-#define BOARD_LATE_INIT
+#define CONFIG_BOARD_LATE_INIT
+
+#ifndef MACH_TYPE_TTC_VISION2
+#define MACH_TYPE_TTC_VISION2 2775
+#endif
+#define CONFIG_MACH_TYPE MACH_TYPE_TTC_VISION2
/*
* Size of malloc() pool
*/
-#define CONFIG_SYS_MALLOC_LEN (2048 * 1024)
-
-/* size in bytes reserved for initial data */
-#define CONFIG_SYS_GBL_DATA_SIZE 128
+#define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024)
/*
* Hardware drivers
#define CONFIG_ENV_IS_IN_SPI_FLASH
/* PMIC Controller */
-#define CONFIG_FSL_PMIC
+#define CONFIG_PMIC
+#define CONFIG_PMIC_SPI
+#define CONFIG_PMIC_FSL
#define CONFIG_FSL_PMIC_BUS 0
#define CONFIG_FSL_PMIC_CS 0
#define CONFIG_FSL_PMIC_CLK 2500000
#define CONFIG_FSL_PMIC_MODE SPI_MODE_0
-#define CONFIG_RTC_MC13783
+#define CONFIG_FSL_PMIC_BITLEN 32
+#define CONFIG_RTC_MC13XXX
/*
* MMC Configs
* Eth Configs
*/
#define CONFIG_HAS_ETH1
-#define CONFIG_NET_MULTI
#define CONFIG_MII
#define CONFIG_DISCOVER_PHY
#define PHYS_SDRAM_1_SIZE (256 * 1024 * 1024)
#define PHYS_SDRAM_2 CSD1_BASE_ADDR
#define PHYS_SDRAM_2_SIZE (256 * 1024 * 1024)
-#define CONFIG_SYS_SDRAM_BASE 0x90000000
-#define CONFIG_SYS_INIT_RAM_ADDR 0x1FFE8000
-
-#ifndef CONFIG_SYS_ARM_WITHOUT_RELOC
-#define CONFIG_SYS_INIT_RAM_END (64 * 1024)
-#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - \
- CONFIG_SYS_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
- CONFIG_SYS_GBL_DATA_OFFSET)
-#undef CONFIG_SKIP_RELOCATE_UBOOT
-#else
-#define CONFIG_SKIP_RELOCATE_UBOOT
-#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + 0x2000)
-#endif
+#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
+#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
+#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
+
+#define CONFIG_SYS_INIT_SP_OFFSET \
+ (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
+#define CONFIG_SYS_INIT_SP_ADDR \
+ (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
#define CONFIG_BOARD_EARLY_INIT_F
#define CONFIG_SYS_NO_FLASH
+/*
+ * Framebuffer and LCD
+ */
+#define CONFIG_PREBOOT
+#define CONFIG_VIDEO
+#define CONFIG_VIDEO_MX5
+#define CONFIG_CFB_CONSOLE
+#define CONFIG_VGA_AS_SINGLE_DEVICE
+#define CONFIG_VIDEO_BMP_RLE8
+#define CONFIG_SPLASH_SCREEN
+#define CONFIG_CMD_BMP
+#define CONFIG_BMP_16BPP
+
#endif /* __CONFIG_H */