ATA_DFLAG_AN = (1 << 7), /* AN configured */
ATA_DFLAG_HIPM = (1 << 8), /* device supports HIPM */
ATA_DFLAG_DIPM = (1 << 9), /* device supports DIPM */
+ ATA_DFLAG_DMADIR = (1 << 10), /* device requires DMADIR */
ATA_DFLAG_CFG_MASK = (1 << 12) - 1,
ATA_DFLAG_PIO = (1 << 12), /* device limited to PIO mode */
ATA_DEV_NONE = 9, /* no device */
/* struct ata_link flags */
- ATA_LFLAG_HRST_TO_RESUME = (1 << 0), /* hardreset to resume link */
ATA_LFLAG_SKIP_D2H_BSY = (1 << 1), /* can't wait for the first D2H
* Register FIS clearing BSY */
ATA_LFLAG_NO_SRST = (1 << 2), /* avoid softreset */
/* size of buffer to pad xfers ending on unaligned boundaries */
ATA_DMA_PAD_SZ = 4,
- ATA_DMA_PAD_BUF_SZ = ATA_DMA_PAD_SZ * ATA_MAX_QUEUE,
/* ering size */
ATA_ERING_SIZE = 32,
/* reset / recovery action types */
ATA_EH_REVALIDATE = (1 << 0),
- ATA_EH_SOFTRESET = (1 << 1),
- ATA_EH_HARDRESET = (1 << 2),
+ ATA_EH_SOFTRESET = (1 << 1), /* meaningful only in ->prereset */
+ ATA_EH_HARDRESET = (1 << 2), /* meaningful only in ->prereset */
+ ATA_EH_RESET = ATA_EH_SOFTRESET | ATA_EH_HARDRESET,
ATA_EH_ENABLE_LINK = (1 << 3),
+ ATA_EH_LPM = (1 << 4), /* link power management action */
- ATA_EH_RESET_MASK = ATA_EH_SOFTRESET | ATA_EH_HARDRESET,
ATA_EH_PERDEV_MASK = ATA_EH_REVALIDATE,
/* ata_eh_info->flags */
ATA_EHI_HOTPLUGGED = (1 << 0), /* could have been hotplugged */
- ATA_EHI_RESUME_LINK = (1 << 1), /* resume link (reset modifier) */
ATA_EHI_NO_AUTOPSY = (1 << 2), /* no autopsy */
ATA_EHI_QUIET = (1 << 3), /* be quiet */
- ATA_EHI_LPM = (1 << 4), /* link power management action */
ATA_EHI_DID_SOFTRESET = (1 << 16), /* already soft-reset this port */
ATA_EHI_DID_HARDRESET = (1 << 17), /* already soft-reset this port */
ATA_EHI_POST_SETMODE = (1 << 20), /* revaildating after setmode */
ATA_EHI_DID_RESET = ATA_EHI_DID_SOFTRESET | ATA_EHI_DID_HARDRESET,
- ATA_EHI_RESET_MODIFIER_MASK = ATA_EHI_RESUME_LINK,
/* max tries if error condition is still set after ->error_handler */
ATA_EH_MAX_TRIES = 5,
ATAPI_READ = 0, /* READs */
ATAPI_WRITE = 1, /* WRITEs */
ATAPI_READ_CD = 2, /* READ CD [MSF] */
- ATAPI_MISC = 3, /* the rest */
+ ATAPI_PASS_THRU = 3, /* SAT pass-thru */
+ ATAPI_MISC = 4, /* the rest */
};
enum ata_xfer_mask {
unsigned long flags; /* ATA_QCFLAG_xxx */
unsigned int tag;
unsigned int n_elem;
- unsigned int mapped_n_elem;
int dma_dir;
- unsigned int pad_len;
unsigned int sect_size;
unsigned int nbytes;
- unsigned int raw_nbytes;
+ unsigned int extrabytes;
unsigned int curbytes;
struct scatterlist *cursg;
unsigned int cursg_ofs;
- struct scatterlist *last_sg;
- struct scatterlist saved_last_sg;
struct scatterlist sgent;
- struct scatterlist extra_sg[2];
struct scatterlist *sg;
struct ata_prd *prd; /* our SG list */
dma_addr_t prd_dma; /* and its DMA mapping */
- void *pad; /* array of DMA pad buffers */
- dma_addr_t pad_dma;
-
struct ata_ioports ioaddr; /* ATA cmd/ctl/dma register blocks */
u8 ctl; /* cache of ATA control register */
*/
extern void ata_tf_load(struct ata_port *ap, const struct ata_taskfile *tf);
extern void ata_tf_read(struct ata_port *ap, struct ata_taskfile *tf);
+extern int atapi_cmd_type(u8 opcode);
extern void ata_tf_to_fis(const struct ata_taskfile *tf,
u8 pmp, int is_cmd, u8 *fis);
extern void ata_tf_from_fis(const u8 *fis, struct ata_taskfile *tf);
static inline void ata_ehi_schedule_probe(struct ata_eh_info *ehi)
{
- ehi->flags |= ATA_EHI_RESUME_LINK;
- ehi->action |= ATA_EH_SOFTRESET;
+ ehi->action |= ATA_EH_RESET;
ehi->probe_mask |= (1 << ATA_MAX_DEVICES) - 1;
}
return ap->pmp_link;
}
- if (++link - ap->pmp_link < ap->nr_pmp_links)
+ if (++link < ap->nr_pmp_links + ap->pmp_link)
return link;
return NULL;
}
return NULL;
}
+static inline unsigned int ata_qc_raw_nbytes(struct ata_queued_cmd *qc)
+{
+ return qc->nbytes - min(qc->extrabytes, qc->nbytes);
+}
+
static inline void ata_tf_init(struct ata_device *dev, struct ata_taskfile *tf)
{
memset(tf, 0, sizeof(*tf));
qc->flags = 0;
qc->cursg = NULL;
qc->cursg_ofs = 0;
- qc->nbytes = qc->raw_nbytes = qc->curbytes = 0;
+ qc->nbytes = qc->extrabytes = qc->curbytes = 0;
qc->n_elem = 0;
- qc->mapped_n_elem = 0;
qc->err_mask = 0;
- qc->pad_len = 0;
- qc->last_sg = NULL;
qc->sect_size = ATA_SECT_SIZE;
ata_tf_init(qc->dev, &qc->tf);
ata_id_has_flush_ext(dev->id);
}
-static inline int atapi_cmd_type(u8 opcode)
-{
- switch (opcode) {
- case GPCMD_READ_10:
- case GPCMD_READ_12:
- return ATAPI_READ;
-
- case GPCMD_WRITE_10:
- case GPCMD_WRITE_12:
- case GPCMD_WRITE_AND_VERIFY_10:
- return ATAPI_WRITE;
-
- case GPCMD_READ_CD:
- case GPCMD_READ_CD_MSF:
- return ATAPI_READ_CD;
-
- default:
- return ATAPI_MISC;
- }
-}
-
static inline unsigned int ac_err_mask(u8 status)
{
if (status & (ATA_BUSY | ATA_DRQ))
return mask;
}
-static inline int ata_pad_alloc(struct ata_port *ap, struct device *dev)
-{
- ap->pad_dma = 0;
- ap->pad = dmam_alloc_coherent(dev, ATA_DMA_PAD_BUF_SZ,
- &ap->pad_dma, GFP_KERNEL);
- return (ap->pad == NULL) ? -ENOMEM : 0;
-}
-
-static inline void ata_pad_free(struct ata_port *ap, struct device *dev)
-{
- dmam_free_coherent(dev, ATA_DMA_PAD_BUF_SZ, ap->pad, ap->pad_dma);
-}
-
static inline struct ata_port *ata_shost_to_port(struct Scsi_Host *host)
{
return *(struct ata_port **)&host->hostdata[0];
projects / mv-sheeva.git / blobdiff