* Some controllers can support SDIO IRQ signalling.
*/
#define TMIO_MMC_SDIO_IRQ (1 << 2)
+
+/* Some controllers don't need to wait 10ms for clock changes */
+#define TMIO_MMC_FAST_CLK_CHG (1 << 3)
+
/*
* Some controllers require waiting for the SD bus to become
* idle before writing to some registers.