*/
enum v4l2_mbus_pixelcode {
V4L2_MBUS_FMT_FIXED = 1,
- V4L2_MBUS_FMT_YUYV8_2X8_LE,
- V4L2_MBUS_FMT_YVYU8_2X8_LE,
- V4L2_MBUS_FMT_YUYV8_2X8_BE,
- V4L2_MBUS_FMT_YVYU8_2X8_BE,
+ V4L2_MBUS_FMT_YUYV8_2X8,
+ V4L2_MBUS_FMT_YVYU8_2X8,
+ V4L2_MBUS_FMT_UYVY8_2X8,
+ V4L2_MBUS_FMT_VYUY8_2X8,
V4L2_MBUS_FMT_RGB555_2X8_PADHI_LE,
V4L2_MBUS_FMT_RGB555_2X8_PADHI_BE,
V4L2_MBUS_FMT_RGB565_2X8_LE,
V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_BE,
V4L2_MBUS_FMT_SBGGR10_2X8_PADLO_BE,
V4L2_MBUS_FMT_SGRBG8_1X8,
+ V4L2_MBUS_FMT_SBGGR12_1X12,
+ V4L2_MBUS_FMT_YUYV8_1_5X8,
+ V4L2_MBUS_FMT_YVYU8_1_5X8,
+ V4L2_MBUS_FMT_UYVY8_1_5X8,
+ V4L2_MBUS_FMT_VYUY8_1_5X8,
};
/**