#define PCI_DCR 0x54 /* PCIe Device Control Register */
#define PCI_DSR 0x56 /* PCIe Device Status Register */
#define PCI_LSR 0x5e /* PCIe Link Status Register */
+#define PCI_LCR 0x5c /* PCIe Link Control Register */
#define PCI_LTSSM 0x404 /* PCIe Link Training, Status State Machine */
#define PCI_LTSSM_L0 0x16 /* L0 state */
struct pci_region *mem,
struct pci_region *prefetch,
struct pci_region *io);
-int pciauto_config_device(struct pci_controller *hose, pci_dev_t dev);
+extern void pciauto_prescan_setup_bridge(struct pci_controller *hose,
+ pci_dev_t dev, int sub_bus);
+extern void pciauto_postscan_setup_bridge(struct pci_controller *hose,
+ pci_dev_t dev, int sub_bus);
+extern void pciauto_config_init(struct pci_controller *hose);
+extern int pciauto_config_device(struct pci_controller *hose, pci_dev_t dev);
extern pci_dev_t pci_find_device (unsigned int vendor, unsigned int device, int index);
extern pci_dev_t pci_find_devices (struct pci_device_id *ids, int index);