83xx: Replace CONFIG_MPC83XX with CONFIG_MPC83xx

[karo-tx-uboot.git] / include / tsec.h

diff --git a/include/tsec.h b/include/tsec.h
index c05b5f090ea35c260e5c06a9d4c9f38139e170c0..9184256b577ef1ecd583d2e13f16a4ccb9da6c85 100644 (file)
--- a/include/tsec.h
+++ b/include/tsec.h
@@ -20,16 +20,16 @@
 #include <net.h>
 #include <config.h>
 
-#ifndef CFG_TSEC1_OFFSET
-    #define CFG_TSEC1_OFFSET   (0x24000)
+#ifndef CONFIG_SYS_TSEC1_OFFSET
+    #define CONFIG_SYS_TSEC1_OFFSET    (0x24000)
 #endif
 
 #define TSEC_SIZE      0x01000
 
 /* FIXME:  Should these be pushed back to 83xx and 85xx config files? */
 #if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx) \
-       || defined(CONFIG_MPC83XX)
-    #define TSEC_BASE_ADDR     (CFG_IMMR + CFG_TSEC1_OFFSET)
+       || defined(CONFIG_MPC83xx)
+    #define TSEC_BASE_ADDR     (CONFIG_SYS_IMMR + CONFIG_SYS_TSEC1_OFFSET)
 #endif
 
 #define STD_TSEC_INFO(num) \
@@ -50,8 +50,6 @@
        x.flags = TSEC##num##_FLAGS;\
 }
 
-
-
 #define MAC_ADDR_LEN 6
 
 /* #define TSEC_TIMEOUT        1000000 */
@@ -60,6 +58,27 @@
 
 #define PHY_AUTONEGOTIATE_TIMEOUT      5000 /* in ms */
 
+/* TBI register addresses */
+#define TBI_CR                 0x00
+#define TBI_SR                 0x01
+#define TBI_ANA                        0x04
+#define TBI_ANLPBPA            0x05
+#define TBI_ANEX               0x06
+#define TBI_TBICON             0x11
+
+/* TBI MDIO register bit fields*/
+#define TBICON_CLK_SELECT      0x0020
+#define TBIANA_ASYMMETRIC_PAUSE 0x0100
+#define TBIANA_SYMMETRIC_PAUSE  0x0080
+#define TBIANA_HALF_DUPLEX     0x0040
+#define TBIANA_FULL_DUPLEX     0x0020
+#define TBICR_PHY_RESET                0x8000
+#define TBICR_ANEG_ENABLE      0x1000
+#define TBICR_RESTART_ANEG     0x0200
+#define TBICR_FULL_DUPLEX      0x0100
+#define TBICR_SPEED1_SET       0x0040
+
+
 /* MAC register bits */
 #define MACCFG1_SOFT_RESET     0x80000000
 #define MACCFG1_RESET_RX_MC    0x00080000
@@ -88,8 +107,8 @@
 #define miim_end -2
 #define miim_read -1
 
-#ifndef CFG_TBIPA_VALUE
-    #define CFG_TBIPA_VALUE    0x1f
+#ifndef CONFIG_SYS_TBIPA_VALUE
+    #define CONFIG_SYS_TBIPA_VALUE     0x1f
 #endif
 #define MIIMCFG_INIT_VALUE     0x00000003
 #define MIIMCFG_RESET          0x80000000
@@ -207,6 +226,10 @@
 #define MIIM_88E1121_PHY_LED_PAGE      3
 #define MIIM_88E1121_PHY_LED_DEF       0x0030
 
+/* 88E1121 PHY IRQ Enable/Status Register */
+#define MIIM_88E1121_PHY_IRQ_EN                18
+#define MIIM_88E1121_PHY_IRQ_STATUS    19
+
 #define MIIM_88E1121_PHY_PAGE          22
 
 /* 88E1145 Extended PHY Specific Control Register */
@@ -540,7 +563,9 @@ typedef struct tsec
 
 /* This flag currently only has
  * meaning if we're using the eTSEC */
-#define TSEC_REDUCED (1 << 1)
+#define TSEC_REDUCED   (1 << 1)
+
+#define TSEC_SGMII     (1 << 2)
 
 struct tsec_private {
        volatile tsec_t *regs;