Add rivest cipher 4 (rc4) implementation

[karo-tx-uboot.git] / lib / fdtdec.c

diff --git a/lib/fdtdec.c b/lib/fdtdec.c
index b76d9cad83fba04d67775cf7cd500d68e0a33fd0..9c6b3619da24cd9ad5c4894d848298ff380d3419 100644 (file)
--- a/lib/fdtdec.c
+++ b/lib/fdtdec.c
@@ -22,14 +22,14 @@ DECLARE_GLOBAL_DATA_PTR;
 #define COMPAT(id, name) name
 static const char * const compat_names[COMPAT_COUNT] = {
        COMPAT(UNKNOWN, "<none>"),
-       COMPAT(NVIDIA_TEGRA20_USB, "nvidia,tegra20-ehci"),
-       COMPAT(NVIDIA_TEGRA30_USB, "nvidia,tegra30-ehci"),
-       COMPAT(NVIDIA_TEGRA114_USB, "nvidia,tegra114-ehci"),
        COMPAT(NVIDIA_TEGRA20_EMC, "nvidia,tegra20-emc"),
        COMPAT(NVIDIA_TEGRA20_EMC_TABLE, "nvidia,tegra20-emc-table"),
        COMPAT(NVIDIA_TEGRA20_KBC, "nvidia,tegra20-kbc"),
        COMPAT(NVIDIA_TEGRA20_NAND, "nvidia,tegra20-nand"),
        COMPAT(NVIDIA_TEGRA20_PWM, "nvidia,tegra20-pwm"),
+       COMPAT(NVIDIA_TEGRA124_DC, "nvidia,tegra124-dc"),
+       COMPAT(NVIDIA_TEGRA124_SOR, "nvidia,tegra124-sor"),
+       COMPAT(NVIDIA_TEGRA124_PMC, "nvidia,tegra124-pmc"),
        COMPAT(NVIDIA_TEGRA20_DC, "nvidia,tegra20-dc"),
        COMPAT(NVIDIA_TEGRA124_SDMMC, "nvidia,tegra124-sdhci"),
        COMPAT(NVIDIA_TEGRA30_SDMMC, "nvidia,tegra30-sdhci"),
@@ -53,11 +53,11 @@ static const char * const compat_names[COMPAT_COUNT] = {
        COMPAT(SAMSUNG_EXYNOS_DWMMC, "samsung,exynos-dwmmc"),
        COMPAT(SAMSUNG_EXYNOS_MMC, "samsung,exynos-mmc"),
        COMPAT(SAMSUNG_EXYNOS_SERIAL, "samsung,exynos4210-uart"),
-       COMPAT(MAXIM_MAX77686_PMIC, "maxim,max77686_pmic"),
+       COMPAT(MAXIM_MAX77686_PMIC, "maxim,max77686"),
        COMPAT(GENERIC_SPI_FLASH, "spi-flash"),
        COMPAT(MAXIM_98095_CODEC, "maxim,max98095-codec"),
        COMPAT(INFINEON_SLB9635_TPM, "infineon,slb9635-tpm"),
-       COMPAT(INFINEON_SLB9645_TPM, "infineon,slb9645-tpm"),
+       COMPAT(INFINEON_SLB9645_TPM, "infineon,slb9645tt"),
        COMPAT(SAMSUNG_EXYNOS5_I2C, "samsung,exynos5-hsi2c"),
        COMPAT(SANDBOX_LCD_SDL, "sandbox,lcd-sdl"),
        COMPAT(TI_TPS65090, "ti,tps65090"),
@@ -72,8 +72,10 @@ static const char * const compat_names[COMPAT_COUNT] = {
        COMPAT(AMS_AS3722, "ams,as3722"),
        COMPAT(INTEL_ICH_SPI, "intel,ich-spi"),
        COMPAT(INTEL_QRK_MRC, "intel,quark-mrc"),
+       COMPAT(INTEL_X86_PINCTRL, "intel,x86-pinctrl"),
        COMPAT(SOCIONEXT_XHCI, "socionext,uniphier-xhci"),
        COMPAT(COMPAT_INTEL_PCH, "intel,bd82x6x"),
+       COMPAT(COMPAT_INTEL_IRQ_ROUTER, "intel,irq-router"),
 };
 
 const char *fdtdec_get_compatible(enum fdt_compat_id id)
@@ -100,8 +102,8 @@ fdt_addr_t fdtdec_get_addr_size(const void *blob, int node,
                        size = (fdt_size_t *)((char *)cell +
                                        sizeof(fdt_addr_t));
                        *sizep = fdt_size_to_cpu(*size);
-                       debug("addr=%08lx, size=%08x\n",
-                             (ulong)addr, *sizep);
+                       debug("addr=%08lx, size=%llx\n",
+                             (ulong)addr, (u64)*sizep);
                } else {
                        debug("%08lx\n", (ulong)addr);
                }
@@ -1037,6 +1039,98 @@ int fdtdec_decode_memory_region(const void *blob, int config_node,
        return 0;
 }
 
+static int decode_timing_property(const void *blob, int node, const char *name,
+                                 struct timing_entry *result)
+{
+       int length, ret = 0;
+       const u32 *prop;
+
+       prop = fdt_getprop(blob, node, name, &length);
+       if (!prop) {
+               debug("%s: could not find property %s\n",
+                     fdt_get_name(blob, node, NULL), name);
+               return length;
+       }
+
+       if (length == sizeof(u32)) {
+               result->typ = fdtdec_get_int(blob, node, name, 0);
+               result->min = result->typ;
+               result->max = result->typ;
+       } else {
+               ret = fdtdec_get_int_array(blob, node, name, &result->min, 3);
+       }
+
+       return ret;
+}
+
+int fdtdec_decode_display_timing(const void *blob, int parent, int index,
+                                struct display_timing *dt)
+{
+       int i, node, timings_node;
+       u32 val = 0;
+       int ret = 0;
+
+       timings_node = fdt_subnode_offset(blob, parent, "display-timings");
+       if (timings_node < 0)
+               return timings_node;
+
+       for (i = 0, node = fdt_first_subnode(blob, timings_node);
+            node > 0 && i != index;
+            node = fdt_next_subnode(blob, node))
+               i++;
+
+       if (node < 0)
+               return node;
+
+       memset(dt, 0, sizeof(*dt));
+
+       ret |= decode_timing_property(blob, node, "hback-porch",
+                                     &dt->hback_porch);
+       ret |= decode_timing_property(blob, node, "hfront-porch",
+                                     &dt->hfront_porch);
+       ret |= decode_timing_property(blob, node, "hactive", &dt->hactive);
+       ret |= decode_timing_property(blob, node, "hsync-len", &dt->hsync_len);
+       ret |= decode_timing_property(blob, node, "vback-porch",
+                                     &dt->vback_porch);
+       ret |= decode_timing_property(blob, node, "vfront-porch",
+                                     &dt->vfront_porch);
+       ret |= decode_timing_property(blob, node, "vactive", &dt->vactive);
+       ret |= decode_timing_property(blob, node, "vsync-len", &dt->vsync_len);
+       ret |= decode_timing_property(blob, node, "clock-frequency",
+                                     &dt->pixelclock);
+
+       dt->flags = 0;
+       val = fdtdec_get_int(blob, node, "vsync-active", -1);
+       if (val != -1) {
+               dt->flags |= val ? DISPLAY_FLAGS_VSYNC_HIGH :
+                               DISPLAY_FLAGS_VSYNC_LOW;
+       }
+       val = fdtdec_get_int(blob, node, "hsync-active", -1);
+       if (val != -1) {
+               dt->flags |= val ? DISPLAY_FLAGS_HSYNC_HIGH :
+                               DISPLAY_FLAGS_HSYNC_LOW;
+       }
+       val = fdtdec_get_int(blob, node, "de-active", -1);
+       if (val != -1) {
+               dt->flags |= val ? DISPLAY_FLAGS_DE_HIGH :
+                               DISPLAY_FLAGS_DE_LOW;
+       }
+       val = fdtdec_get_int(blob, node, "pixelclk-active", -1);
+       if (val != -1) {
+               dt->flags |= val ? DISPLAY_FLAGS_PIXDATA_POSEDGE :
+                               DISPLAY_FLAGS_PIXDATA_NEGEDGE;
+       }
+
+       if (fdtdec_get_bool(blob, node, "interlaced"))
+               dt->flags |= DISPLAY_FLAGS_INTERLACED;
+       if (fdtdec_get_bool(blob, node, "doublescan"))
+               dt->flags |= DISPLAY_FLAGS_DOUBLESCAN;
+       if (fdtdec_get_bool(blob, node, "doubleclk"))
+               dt->flags |= DISPLAY_FLAGS_DOUBLECLK;
+
+       return 0;
+}
+
 int fdtdec_setup(void)
 {
 #ifdef CONFIG_OF_CONTROL