85xx/86xx: Replace in8/out8 with in_8/out_8 on FSL boards

[karo-tx-uboot.git] / lib_nios2 / board.c

diff --git a/lib_nios2/board.c b/lib_nios2/board.c
index cd23037771407993b92229166ed83efc66504702..b142c59613796fa894088d7b6f69508aa60071eb 100644 (file)
--- a/lib_nios2/board.c
+++ b/lib_nios2/board.c
@@ -25,12 +25,15 @@
  */
 
 #include <common.h>
-#include <devices.h>
+#include <stdio_dev.h>
 #include <watchdog.h>
 #include <net.h>
 #ifdef CONFIG_STATUS_LED
 #include <status_led.h>
 #endif
+#if defined(CONFIG_SYS_NIOS_EPCSBASE)
+#include <nios2-epcs.h>
+#endif
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -63,8 +66,8 @@ static        ulong   mem_malloc_brk   = 0;
  */
 static void mem_malloc_init (void)
 {
-       mem_malloc_start = CFG_MALLOC_BASE;
-       mem_malloc_end = mem_malloc_start + CFG_MALLOC_LEN;
+       mem_malloc_start = CONFIG_SYS_MALLOC_BASE;
+       mem_malloc_end = mem_malloc_start + CONFIG_SYS_MALLOC_LEN;
        mem_malloc_brk = mem_malloc_start;
        memset ((void *) mem_malloc_start,
                0,
@@ -93,6 +96,9 @@ init_fnc_t *init_sequence[] = {
 #if defined(CONFIG_BOARD_EARLY_INIT_F)
        board_early_init_f,     /* Call board-specific init code early.*/
 #endif
+#if defined(CONFIG_SYS_NIOS_EPCSBASE)
+       epcs_reset,
+#endif
 
        env_init,
        serial_init,
@@ -113,25 +119,25 @@ void board_init (void)
        int i;
 
        /* Pointer is writable since we allocated a register for it.
-        * Nios treats CFG_GBL_DATA_OFFSET as an address.
+        * Nios treats CONFIG_SYS_GBL_DATA_OFFSET as an address.
         */
-       gd = (gd_t *)CFG_GBL_DATA_OFFSET;
+       gd = (gd_t *)CONFIG_SYS_GBL_DATA_OFFSET;
        /* compiler optimization barrier needed for GCC >= 3.4 */
        __asm__ __volatile__("": : :"memory");
 
-       memset( gd, 0, CFG_GBL_DATA_SIZE );
+       memset( gd, 0, CONFIG_SYS_GBL_DATA_SIZE );
 
        gd->bd = (bd_t *)(gd+1);        /* At end of global data */
        gd->baudrate = CONFIG_BAUDRATE;
        gd->cpu_clk = CONFIG_SYS_CLK_FREQ;
 
        bd = gd->bd;
-       bd->bi_memstart = CFG_SDRAM_BASE;
-       bd->bi_memsize = CFG_SDRAM_SIZE;
-       bd->bi_flashstart = CFG_FLASH_BASE;
-#if    defined(CFG_SRAM_BASE) && defined(CFG_SRAM_SIZE)
-       bd->bi_sramstart= CFG_SRAM_BASE;
-       bd->bi_sramsize = CFG_SRAM_SIZE;
+       bd->bi_memstart = CONFIG_SYS_SDRAM_BASE;
+       bd->bi_memsize = CONFIG_SYS_SDRAM_SIZE;
+       bd->bi_flashstart = CONFIG_SYS_FLASH_BASE;
+#if    defined(CONFIG_SYS_SRAM_BASE) && defined(CONFIG_SYS_SRAM_SIZE)
+       bd->bi_sramstart= CONFIG_SYS_SRAM_BASE;
+       bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE;
 #endif
        bd->bi_baudrate = CONFIG_BAUDRATE;
 
@@ -142,29 +148,30 @@ void board_init (void)
                }
        }
 
+       WATCHDOG_RESET ();
+       mem_malloc_init();
+       malloc_bin_reloc();
+
        WATCHDOG_RESET ();
        bd->bi_flashsize = flash_init();
 
        WATCHDOG_RESET ();
-       mem_malloc_init();
-       malloc_bin_reloc();
        env_relocate();
 
        bd->bi_ip_addr = getenv_IPaddr ("ipaddr");
-       s = getenv ("ethaddr");
-       for (i = 0; i < 6; ++i) {
-               bd->bi_enetaddr[i] = s ? simple_strtoul (s, &e, 16) : 0;
-               if (s) s = (*e) ? e + 1 : e;
-       }
 
        WATCHDOG_RESET ();
-       devices_init();
+       stdio_init();
        jumptable_init();
        console_init_r();
 
        WATCHDOG_RESET ();
        interrupt_init ();
 
+#if defined(CONFIG_BOARD_LATE_INIT)
+       board_late_init ();
+#endif
+
        /* main_loop */
        for (;;) {
                WATCHDOG_RESET ();