arm/km: use ARRAY_SIZE macro

[karo-tx-uboot.git] / nand_spl / nand_boot_fsl_nfc.c

diff --git a/nand_spl/nand_boot_fsl_nfc.c b/nand_spl/nand_boot_fsl_nfc.c
index a9df2a8273f30e9d2e65a2962762a04251a85f7d..d6b0d9b6d10502c7d570c360a14fc7a015308329 100644 (file)
--- a/nand_spl/nand_boot_fsl_nfc.c
+++ b/nand_spl/nand_boot_fsl_nfc.c
@@ -26,11 +26,11 @@
 
 #include <common.h>
 #include <nand.h>
-#include <asm-arm/arch/mx31-regs.h>
+#include <asm/arch/imx-regs.h>
 #include <asm/io.h>
 #include <fsl_nfc.h>
 
-static struct fsl_nfc_regs *nfc;
+static struct fsl_nfc_regs *const nfc = (void *)NFC_BASE_ADDR;
 
 static void nfc_wait_ready(void)
 {
@@ -45,13 +45,35 @@ static void nfc_wait_ready(void)
        writew(tmp, &nfc->nand_flash_config2);
 }
 
-static void nfc_nand_init(void)
+void nfc_nand_init(void)
 {
+#if defined(MXC_NFC_V1_1)
+       int ecc_per_page  = CONFIG_SYS_NAND_PAGE_SIZE / 512;
+       int config1;
+
+       writew(CONFIG_SYS_NAND_SPARE_SIZE / 2, &nfc->spare_area_size);
+
+       /* unlocking RAM Buff */
+       writew(0x2, &nfc->configuration);
+
+       /* hardware ECC checking and correct */
+       config1 = readw(&nfc->nand_flash_config1) | NFC_ECC_EN | 0x800;
+       /*
+        * if spare size is larger that 16 bytes per 512 byte hunk
+        * then use 8 symbol correction instead of 4
+        */
+       if ((CONFIG_SYS_NAND_SPARE_SIZE / ecc_per_page) > 16)
+               config1 &= ~NFC_4_8N_ECC;
+       else
+               config1 |= NFC_4_8N_ECC;
+       writew(config1, &nfc->nand_flash_config1);
+#elif defined(MXC_NFC_V1)
        /* unlocking RAM Buff */
        writew(0x2, &nfc->configuration);
 
        /* hardware ECC checking and correct */
        writew(NFC_ECC_EN, &nfc->nand_flash_config1);
+#endif
 }
 
 static void nfc_nand_command(unsigned short command)
@@ -65,12 +87,12 @@ static void nfc_nand_page_address(unsigned int page_address)
 {
        unsigned int page_count;
 
-       writew(0x00, &nfc->flash_cmd);
+       writew(0x00, &nfc->flash_add);
        writew(NFC_ADDR, &nfc->nand_flash_config2);
        nfc_wait_ready();
 
-       /* code only for 2kb flash */
-       if (CONFIG_SYS_NAND_PAGE_SIZE == 0x800) {
+       /* code only for large page flash */
+       if (CONFIG_SYS_NAND_PAGE_SIZE > 512) {
                writew(0x00, &nfc->flash_add);
                writew(NFC_ADDR, &nfc->nand_flash_config2);
                nfc_wait_ready();
@@ -88,22 +110,38 @@ static void nfc_nand_page_address(unsigned int page_address)
                        page_count = page_count >> 8;
                } while (page_count);
        }
+
+       writew(0x00, &nfc->flash_add);
+       writew(NFC_ADDR, &nfc->nand_flash_config2);
+       nfc_wait_ready();
 }
 
 static void nfc_nand_data_output(void)
 {
+       int config1 = readw(&nfc->nand_flash_config1);
+#ifdef NAND_MXC_2K_MULTI_CYCLE
        int i;
+#endif
 
+       config1 |= NFC_ECC_EN | NFC_INT_MSK;
+       writew(config1, &nfc->nand_flash_config1);
+       writew(0, &nfc->buffer_address);
+       writew(NFC_OUTPUT, &nfc->nand_flash_config2);
+       nfc_wait_ready();
+#ifdef NAND_MXC_2K_MULTI_CYCLE
        /*
-        * The NAND controller requires four output commands for
-        * large page devices.
+        * This NAND controller requires multiple input commands
+        * for pages larger than 512 bytes.
         */
-       for (i = 0; i < (CONFIG_SYS_NAND_PAGE_SIZE / 512); i++) {
-               writew(NFC_ECC_EN, &nfc->nand_flash_config1);
-               writew(i, &nfc->buffer_address); /* read in i:th buffer */
+       for (i = 1; i < (CONFIG_SYS_NAND_PAGE_SIZE / 512); i++) {
+               config1 = readw(&nfc->nand_flash_config1);
+               config1 |= NFC_ECC_EN | NFC_INT_MSK;
+               writew(config1, &nfc->nand_flash_config1);
+               writew(i, &nfc->buffer_address);
                writew(NFC_OUTPUT, &nfc->nand_flash_config2);
                nfc_wait_ready();
        }
+#endif
 }
 
 static int nfc_nand_check_ecc(void)
@@ -121,7 +159,7 @@ static int nfc_read_page(unsigned int page_address, unsigned char *buf)
        nfc_nand_command(NAND_CMD_READ0);
        nfc_nand_page_address(page_address);
 
-       if (CONFIG_SYS_NAND_PAGE_SIZE == 0x800)
+       if (CONFIG_SYS_NAND_PAGE_SIZE > 512)
                nfc_nand_command(NAND_CMD_READSTART);
 
        nfc_nand_data_output(); /* fill the main buffer 0 */
@@ -129,7 +167,7 @@ static int nfc_read_page(unsigned int page_address, unsigned char *buf)
        if (nfc_nand_check_ecc())
                return -1;
 
-       src = &nfc->main_area0[0];
+       src = &nfc->main_area[0][0];
        dst = (u32 *)buf;
 
        /* main copy loop from NAND-buffer to SDRAM memory */
@@ -154,12 +192,12 @@ static int is_badblock(int pagenumber)
                nfc_nand_command(NAND_CMD_READ0);
                nfc_nand_page_address(page);
 
-               if (CONFIG_SYS_NAND_PAGE_SIZE == 0x800)
+               if (CONFIG_SYS_NAND_PAGE_SIZE > 512)
                        nfc_nand_command(NAND_CMD_READSTART);
 
                nfc_nand_data_output(); /* fill the main buffer 0 */
 
-               src = &nfc->spare_area0[0];
+               src = &nfc->spare_area[0][0];
 
                /*
                 * IMPORTANT NOTE: The nand flash controller uses a non-
@@ -186,8 +224,6 @@ static int nand_load(unsigned int from, unsigned int size, unsigned char *buf)
        unsigned int maxpages = CONFIG_SYS_NAND_SIZE /
                                CONFIG_SYS_NAND_PAGE_SIZE;
 
-       nfc = (void *)NFC_BASE_ADDR;
-
        nfc_nand_init();
 
        /* Convert to page number */
@@ -209,7 +245,7 @@ static int nand_load(unsigned int from, unsigned int size, unsigned char *buf)
                if (!(page % CONFIG_SYS_NAND_PAGE_COUNT)) {
                        /*
                         * Yes, new block. See if this block is good. If not,
-                        * loop until we find i good block.
+                        * loop until we find a good block.
                         */
                        while (is_badblock(page)) {
                                page = page + CONFIG_SYS_NAND_PAGE_COUNT;
@@ -223,6 +259,14 @@ static int nand_load(unsigned int from, unsigned int size, unsigned char *buf)
        return 0;
 }
 
+#if defined(CONFIG_ARM)
+void board_init_f (ulong bootflag)
+{
+       relocate_code (CONFIG_SYS_TEXT_BASE - TOTAL_MALLOC_LEN, NULL,
+                      CONFIG_SYS_TEXT_BASE);
+}
+#endif
+
 /*
  * The main entry for NAND booting. It's necessary that SDRAM is already
  * configured and available since this code loads the main U-Boot image
@@ -232,8 +276,6 @@ void nand_boot(void)
 {
        __attribute__((noreturn)) void (*uboot)(void);
 
-       nfc = (void *)NFC_BASE_ADDR;
-
        /*
         * CONFIG_SYS_NAND_U_BOOT_OFFS and CONFIG_SYS_NAND_U_BOOT_SIZE must
         * be aligned to full pages