+++ /dev/null
-//==========================================================================
-//
-// triton270_misc.c
-//
-// HAL misc board support code for XScale TRITON270
-//
-//==========================================================================
-//#####ECOSGPLCOPYRIGHTBEGIN####
-//## -------------------------------------------
-//## This file is part of eCos, the Embedded Configurable Operating System.
-//## Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
-//##
-//## eCos is free software; you can redistribute it and/or modify it under
-//## the terms of the GNU General Public License as published by the Free
-//## Software Foundation; either version 2 or (at your option) any later version.
-//##
-//## eCos is distributed in the hope that it will be useful, but WITHOUT ANY
-//## WARRANTY; without even the implied warranty of MERCHANTABILITY or
-//## FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
-//## for more details.
-//##
-//## You should have received a copy of the GNU General Public License along
-//## with eCos; if not, write to the Free Software Foundation, Inc.,
-//## 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
-//##
-//## As a special exception, if other files instantiate templates or use macros
-//## or inline functions from this file, or you compile this file and link it
-//## with other works to produce a work based on this file, this file does not
-//## by itself cause the resulting work to be covered by the GNU General Public
-//## License. However the source code for this file must still be made available
-//## in accordance with section (3) of the GNU General Public License.
-//##
-//## This exception does not invalidate any other reasons why a work based on
-//## this file might be covered by the GNU General Public License.
-//##
-//## Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
-//## at http://sources.redhat.com/ecos/ecos-license/
-//## -------------------------------------------
-//#####ECOSGPLCOPYRIGHTEND####
-//==========================================================================
-//#####DESCRIPTIONBEGIN####
-//
-// Author(s): msalter, usteinkohl
-// Contributors: msalter, usteinkohl
-// Date: 20th August 2004 (last modification)
-// Purpose: HAL board support
-// Description: Implementations of HAL board interfaces
-//
-//####DESCRIPTIONEND####
-//
-//========================================================================*/
-#include <redboot.h>
-#include <flash_config.h>
-
-#include <pkgconf/hal.h>
-#include <pkgconf/system.h>
-#include CYGBLD_HAL_PLATFORM_H
-#include CYGHWR_MEMORY_LAYOUT_H
-
-#include <cyg/infra/cyg_type.h> // base types
-#include <cyg/infra/cyg_trac.h> // tracing macros
-#include <cyg/infra/cyg_ass.h> // assertion macros
-
-#include <cyg/hal/hal_io.h> // IO macros
-#include <cyg/hal/hal_stub.h> // Stub macros
-#include <cyg/hal/hal_if.h> // calling interface API
-#include <cyg/hal/hal_arch.h> // Register state info
-#include <cyg/hal/hal_diag.h>
-#include <cyg/hal/hal_intr.h> // Interrupt names
-#include <cyg/hal/hal_cache.h>
-#include <cyg/hal/hal_triton270.h> // Hardware definitions
-#include <cyg/hal/drv_api.h> // CYG_ISR_HANDLED
-
-extern int printf(char *fmt, ...);
-
-inline unsigned long _fu_phys_address(unsigned long _x_)
-{
- switch (_x_>>12) {
- case 0x0:
- return _x_ + 0xa0000000;
- case 0xa0000:
- return _x_ & 0xfffffff;
- default:
- return _x_;
- }
-}
-
-/*------------------------------------------------------------------------*/
-/* IDE support */
-
-void cyg_hal_plf_ide_init(void)
-{
-}
-
-void coldstart(void)
-{
- cyg_uint32 value;
-
- HAL_WRITE_UINT32(OSCR, 0); // initialize os timer counter
- HAL_WRITE_UINT32(RCNR, 0); // initialize rtc counter
- HAL_WRITE_UINT32(RTTR, 0x7FFF); // divide RTC to get 1hz output
- //
- // initialize interrupt registers
- //
- HAL_WRITE_UINT32(ICMR, 0); // Pending Interrupts are masked from becoming active
- HAL_WRITE_UINT32(ICMR2, 0);
- HAL_WRITE_UINT32(ICLR, 0); // Route all Interrupts to CPU IRQ (none to FIQ)
- HAL_WRITE_UINT32(ICLR2, 0);
- HAL_WRITE_UINT32(ICCR, 1); // Only enabled and unmasked interrupt bring core out of idle
-
- //
- // setup general purpose I/Os (specific to TRITON270 board)
- // must set GPSR/GPCR, then set GPDR, then set GPAFR
- //
- // this is already done in the assembly code.
-
- // clear all edge detect status bits
- HAL_WRITE_UINT32(GEDRa, 0xffffffff); // clear all bits
- HAL_WRITE_UINT32(GEDRb, 0xffffffff);
- HAL_WRITE_UINT32(GEDRc, 0xffffffff);
- HAL_WRITE_UINT32(GEDRd, 0xffffffff);
-
- // setup PCMCIA timing parameters (should be optimized (usteinkohl)
- //
- // this is SK3 specific
- //
- // for about 200 MHz MEMCLK:
- // command setup: 30 nsec
- // command minimum duration: 100 nsec
- // command hold: 20 nsec
-
- HAL_WRITE_UINT32(MCIO0, 0x00040286);
- HAL_WRITE_UINT32(MCIO1, 0x00040286);
-
- HAL_WRITE_UINT32(MCMEM0, 0x00040286);
- HAL_WRITE_UINT32(MCMEM1, 0x00040286);
-
- HAL_WRITE_UINT32(MCATT0, 0x00040286);
- HAL_WRITE_UINT32(MCATT1, 0x00040286);
-
- HAL_WRITE_UINT32(MECR, 0x3); // set CIT and NOS
-
- HAL_WRITE_UINT32(PWRICR, ICR_UR); // reset i2c_unit;
- HAL_WRITE_UINT32(PWRICR, ICR_IUE | ICR_SCLE | ICR_GCD);
-
- HAL_READ_UINT32(PCFR, value);
- //value |= 0x00000040; // enable PI2C
- value = value & (~0x400); // disable voltage change sequencer
- HAL_WRITE_UINT32(PCFR, value);
-}
-
-void hal_sio_print_string(char *buf)
-{
- cyg_uint32 value;
-
- while(1) {
- HAL_READ_UINT32(STLSR, value);
- while(!(value & 0x40)) {
- HAL_READ_UINT32(STLSR, value);
- }
- value = (cyg_uint32)(*buf++) & 0xff;
- if (!value) {
- return;
- } else {
- HAL_WRITE_UINT32(STTHR, value);
- }
- }
-
-}
-
-void unlock_flash_all(void);
-
-void hal_hardware_init(void)
-{
- cyg_uint32 cken;
- cyg_uint32 val;
- int ind;
-
- HAL_READ_UINT32(CKEN, cken);
- // enable FFUART clock and BTUART clock and STUART
- HAL_WRITE_UINT32(CKEN, cken | 0xe0);
-
- // Let the "OS" counter run
- coldstart();
-
- // Set up eCos/ROM interfaces
- hal_if_init(); //ecos, not platform, specifc. Common to all. Do not change.
-
- // Enable caches
- HAL_DCACHE_ENABLE(); //leave this
- HAL_ICACHE_ENABLE(); //leave this
-
- //diag_printf("CKEN register: 0x%08X\n", cken);
-
- // check if we restart from sleep mode
- HAL_READ_UINT32(RCSR, val);
- //HAL_WRITE_UINT32(RCSR, 0xf); // clear all bits
- if (val & 0x0f) {
- const char *sep = " ";
- diag_printf("\nReset caused by:");
- if (val & 1) {
- diag_printf("%shardware reset pin", sep);
- sep = " + ";
- }
- if (val & 0x02) {
- diag_printf("%swatchdog reset", sep);
- sep = " + ";
- }
- if (val & 0x08) {
- diag_printf("%sGPIO reset\n", sep);
- sep = " + ";
- }
- if (val & 0x04) {
- diag_printf("%ssleep reset", sep);
- sep = " + ";
- HAL_READ_UINT32(PSPR, val);
- if (!val) {
- diag_printf("\nwarning, NULL pointer detected in PSPR register\n");
- } else {
- diag_printf("\nrestarting operating system ...\n");
- asm volatile (
- "mov pc, %0;" // jump to pointer
- :
- : "r"(val)
- );
- }
- }
- diag_printf("\n");
- } else {
- diag_printf("\nwarning, unknown reset source !!!!\n");
- diag_printf("RCSR register: 0x%08X\n", val);
- }
-
- ind = get_clock_table_index(208);
-
- HAL_READ_UINT32(MDREFR, val);
- val |= 0x20000000; // set K0DB4
- HAL_WRITE_UINT32(MDREFR, val);
-
- change_core_voltage(ind);
- change_clock(ind);
-
- if (pclktab[ind].MDREFR_K0DB2) {
- HAL_READ_UINT32(MDREFR, val); // set K0DB2
- val |= 0x00004000;
- } else {
- HAL_READ_UINT32(MDREFR, val); // reset K0DB0
- val &= (~0x00004000);
- }
- HAL_WRITE_UINT32(MDREFR, val);
-
- if (pclktab[ind].MDREFR_K0DB4) {
- HAL_READ_UINT32(MDREFR, val); // set K0DB2
- val |= 0x20000000;
- } else {
- HAL_READ_UINT32(MDREFR, val); // reset K0DB2
- val &= (~0x20000000);
- }
- HAL_WRITE_UINT32(MDREFR, val);
-}
-
-void enable_sdcard_power(void)
-{
- unsigned long value;
-
- HAL_READ_UINT32(GAFR1c, value); // set alternate function of GPIO91 to 0
- value &= 0xff3fffff;
- HAL_WRITE_UINT32(GAFR1c, value);
-
- HAL_READ_UINT32(GPDRc, value); // config GPIO91 as output
- value |= 0x08000000;
- HAL_WRITE_UINT32(GPDRc, value);
-
- HAL_WRITE_UINT32(GPCRc, 0x08000000); // clear GPIO91
- HAL_DELAY_US(1000*1000);
-
- HAL_WRITE_UINT32(DRCMR21, 0x00000088); // map SDCARD receive to DMA channel No. 8
- HAL_WRITE_UINT32(DCSR8, 0x40000000); // set DMA channel to no descriptor fetch mode
- HAL_WRITE_UINT32(DALGN, 0x100); // allow byte allinement for channel 8
-
-#if 0 // only for Debug
- HAL_WRITE_UINT32(GPCRa, 0x800);
-
- HAL_READ_UINT32(GPDRa, value);
- value |= 0x800;
- HAL_WRITE_UINT32(GPDRa, value);
-#endif
-
-}
-
-#include CYGHWR_MEMORY_LAYOUT_H
-typedef void code_fun(void);
-void triton270_program_new_stack(void *func)
-{
- register CYG_ADDRESS stack_ptr asm("sp");
- register CYG_ADDRESS old_stack asm("r4");
- register code_fun *new_func asm("r0");
-
- old_stack = stack_ptr;
-
- stack_ptr = CYGMEM_REGION_ram + CYGMEM_REGION_ram_SIZE - sizeof(CYG_ADDRESS);
- new_func = (code_fun*)func;
- new_func();
-
- stack_ptr = old_stack;
-}
-
-#if 0
- asm volatile (
- "ldr r1,=0x00000800;" // we use GPIO23 for controlling the debug LED
-
- "250961:;"
- "ldr r0,=0x40E00024;" // GPCR0
- "str r1, [r0];" // switch the LED on
-
- "ldr r2,=0x00a00000;" // wait some time
- "mov r3,#1 ;"
- "998:;"
- "sub r2, r2, r3;"
- "cmp r2,#0;"
- "bne 998b;"
-
- "ldr r0,=0x40E00018;" // GPSR0
- "str r1, [r0];" // switch the LED off
-
- "ldr r2,=0x00a00000;" // wait some time
- "mov r3,#1;"
- "998:;"
- "sub r2, r2, r3;"
- "cmp r2,#0;"
- "bne 998b;"
-
- "b 250961b;"
- :
- :
- : "r0","r1","r2","r3"
- );
-#endif
-
-// Initialize the clock
-static cyg_uint32 clock_period;
-
-void hal_clock_initialize(cyg_uint32 period)
-{
- cyg_uint32 oier;
-
- // Load match value
- HAL_WRITE_UINT32(OSMR0, period);
- clock_period = period;
-
- // Start the counter
- HAL_WRITE_UINT32(OSCR, 0);
- // Clear any pending interrupt
- HAL_WRITE_UINT32(OSSR, OSSR_TIMER0);
- // Enable timer 0 interrupt
- HAL_READ_UINT32(OIER, oier);
- HAL_WRITE_UINT32(OIER, oier | OIER_TIMER0);
-
- // Unmask timer 0 interrupt
- HAL_INTERRUPT_UNMASK(CYGNUM_HAL_INTERRUPT_TIMER0);
-}
-
-// This routine is called during a clock interrupt.
-void hal_clock_reset(cyg_uint32 vector, cyg_uint32 period)
-{
- cyg_uint32 oscr;
-
- // Load new match value
- HAL_READ_UINT32(OSCR, oscr);
- HAL_WRITE_UINT32(OSMR0, oscr + period);
- // Clear any pending interrupt
- HAL_WRITE_UINT32(OSSR, OSSR_TIMER0);
-}
-
-// Read the current value of the clock, returning the number of hardware
-// "ticks" that have occurred (i.e. how far away the current value is from
-// the start)
-
-// Note: The "contract" for this function is that the value is the number
-// of hardware clocks that have happened since the last interrupt (i.e.
-// when it was reset). This value is used to measure interrupt latencies.
-// However, since the hardware counter runs freely, this routine computes
-// the difference between the current clock period and the number of hardware
-// ticks left before the next timer interrupt.
-void hal_clock_read(cyg_uint32 *pvalue)
-{
- int orig;
- cyg_uint32 oscr;
- cyg_uint32 osmr0;
-
- HAL_DISABLE_INTERRUPTS(orig);
- HAL_READ_UINT32(OSCR, oscr);
- HAL_READ_UINT32(OSMR0, osmr0);
- *pvalue = clock_period + oscr - osmr0;
- HAL_RESTORE_INTERRUPTS(orig);
-}
-
-// Delay for some number of micro-seconds
-void hal_delay_us(cyg_uint32 time)
-{
- cyg_uint32 val = 0;
- cyg_uint32 ctr;
-
- HAL_READ_UINT32(OSCR, ctr);
- while (time-- > 0) {
- do {
- cyg_uint32 oscr;
-
- HAL_READ_UINT32(OSCR, oscr);
- if (ctr != oscr) {
- // FIXME: DEFINE AND USE a global CLOCK_TICK_RATE somewhere!
- // This value is WRONG for PXA270!
- //val += 271267; // 271267ps (3.6864Mhz -> 271.267ns)
- val += 307692; // 307692ps (3.25Mhz -> 307.692ns)
- ++ctr;
- }
- } while (val < 1000000);
- val -= 1000000;
- }
-}
-
-typedef cyg_uint32 cyg_ISR(cyg_uint32 vector, CYG_ADDRWORD data);
-
-extern void cyg_interrupt_post_dsr(CYG_ADDRWORD intr_obj);
-
-static inline cyg_uint32 hal_call_isr(cyg_uint32 vector)
-{
- return 0;
-}
-
-// Interrupt handling
-
-// This routine is called to respond to a hardware interrupt (IRQ). It
-// should interrogate the hardware and return the IRQ vector number.
-int hal_IRQ_handler(void)
-{
- cyg_uint32 sources, index;
-
-#ifdef HAL_EXTENDED_IRQ_HANDLER
- // Use platform specific IRQ handler, if defined
- // Note: this macro should do a 'return' with the appropriate
- // interrupt number if such an extended interrupt exists. The
- // assumption is that the line after the macro starts 'normal' processing.
- HAL_EXTENDED_IRQ_HANDLER(index);
-#endif
-
- HAL_READ_UINT32(ICIP, sources);
- if (sources & 0xff0000) {
- index = 16;
- } else if (sources & 0xff00) {
- index = 8;
- } else if (sources & 0xff) {
- index = 0;
- } else {
- index = 24;
- }
- do {
- if ((1 << index) & sources) {
- if (index == CYGNUM_HAL_INTERRUPT_GPIO) {
- // Special case of GPIO cascade. Search for lowest set bit
- HAL_READ_UINT32(GEDRa, sources);
- index = 0;
- do {
- if (sources & (1 << index)) {
- return index + 32;
- }
- index++;
- } while (index < 32);
- HAL_READ_UINT32(GEDRb, sources);
- index = 0;
- do {
- if (sources & (1 << index)) {
- return index + 64;
- }
- index++;
- } while (index < 32);
- HAL_READ_UINT32(GEDRc, sources);
- index = 0;
- do {
- if (sources & (1 << index)) {
- return index + 96;
- }
- index++;
- } while (index < 32);
- HAL_READ_UINT32(GEDRc, sources);
- index = 0;
- do {
- if (sources & (1 << index)) {
- return index + 128;
- }
- index++;
- } while (index < 23); // GPIOs 96..118
- }
- return index;
- }
- index++;
- } while (index & 7);
-
- return CYGNUM_HAL_INTERRUPT_NONE; // This shouldn't happen!
-}
-
-void hal_interrupt_mask(int vector)
-{
- cyg_uint32 icmr;
-
-#ifdef HAL_EXTENDED_INTERRUPT_MASK
- // Use platform specific handling, if defined
- // Note: this macro should do a 'return' for "extended" values of 'vector'
- // Normal vectors are handled by code subsequent to the macro call.
- HAL_EXTENDED_INTERRUPT_MASK(vector);
-#endif
- if (vector >= CYGNUM_HAL_INTERRUPT_GPIO2) {
- vector = CYGNUM_HAL_INTERRUPT_GPIO;
- }
- HAL_READ_UINT32(ICMR, icmr);
- HAL_WRITE_UINT32(ICMR, icmr & ~(1 << vector));
-}
-
-void hal_interrupt_unmask(int vector)
-{
- cyg_uint32 icmr;
-
-#ifdef HAL_EXTENDED_INTERRUPT_UNMASK
- // Use platform specific handling, if defined
- // Note: this macro should do a 'return' for "extended" values of 'vector'
- // Normal vectors are handled by code subsequent to the macro call.
- HAL_EXTENDED_INTERRUPT_UNMASK(vector);
-#endif
-
- if (vector >= CYGNUM_HAL_INTERRUPT_GPIO2) {
- vector = CYGNUM_HAL_INTERRUPT_GPIO;
- }
- HAL_READ_UINT32(ICMR, icmr);
- HAL_WRITE_UINT32(ICMR, icmr | (1 << vector));
-}
-
-void hal_interrupt_acknowledge(int vector)
-{
- cyg_uint32 rtsr;
-
-#if DEBUG_INT
- diag_printf("void hal_interrupt_acknowledge(int vector) entered ...\n");
- diag_printf("vector = %d \n", vector);
-#endif
- switch (vector) {
- case CYGNUM_HAL_INTERRUPT_ALARM:
- HAL_READ_UINT32(RTSR, rtsr);
- HAL_WRITE_UINT32(RTSR, (rtsr & ~0x2553) | 0x1);
- break;
- case CYGNUM_HAL_INTERRUPT_HZ:
- HAL_READ_UINT32(RTSR, rtsr);
- HAL_WRITE_UINT32(RTSR, (rtsr & ~0x2553) | 0x2);
- break;
- case CYGNUM_HAL_INTERRUPT_TIMER3:
- HAL_WRITE_UINT32(OSSR, 0x08);
- break;
- case CYGNUM_HAL_INTERRUPT_TIMER2:
- HAL_WRITE_UINT32(OSSR, 0x04);
- break;
- case CYGNUM_HAL_INTERRUPT_TIMER1:
- HAL_WRITE_UINT32(OSSR, 0x02);
- break;
- case CYGNUM_HAL_INTERRUPT_TIMER0:
- HAL_WRITE_UINT32(OSSR, 0x01);
- break;
- case CYGNUM_HAL_INTERRUPT_DMA:
- // user specific code here
- break;
- case CYGNUM_HAL_INTERRUPT_SSP:
- // user specific code here
- break;
- case CYGNUM_HAL_INTERRUPT_MMC:
- // user specific code here
- break;
- case CYGNUM_HAL_INTERRUPT_FFUART:
- // user specific code here
- break;
- case CYGNUM_HAL_INTERRUPT_BTUART:
- // user specific code here
- break;
- case CYGNUM_HAL_INTERRUPT_STUART:
- // user specific code here
- break;
- case CYGNUM_HAL_INTERRUPT_ICP:
- // user specific code here
- break;
- case CYGNUM_HAL_INTERRUPT_I2S:
- // user specific code here
- break;
- case CYGNUM_HAL_INTERRUPT_LCD:
- // user specific code here
- break;
- case CYGNUM_HAL_INTERRUPT_AC97:
- // user specific code here
- break;
- case CYGNUM_HAL_INTERRUPT_I2C:
- // user specific code here
- break;
- case CYGNUM_HAL_INTERRUPT_PMU:
- // user specific code here
- break;
- case CYGNUM_HAL_INTERRUPT_USB:
- // user specific code here
- break;
- // GPIO interrupts are driven by an edge detection mechanism. This
- // is latching so these interrupts must be acknowledged directly.
- // All other interrupts simply go away when the interrupting unit
- // has been serviced by the ISR.
- case CYGNUM_HAL_INTERRUPT_GPIO1:
- HAL_WRITE_UINT32(GEDRa, 0x2);
- break;
- case CYGNUM_HAL_INTERRUPT_GPIO0:
- HAL_WRITE_UINT32(GEDRa, 0x1);
- break;
- default: // the rest is second level GPIO
- if (vector >= CYGNUM_HAL_INTERRUPT_GPIO96) {
- HAL_WRITE_UINT32(GEDRd, (1 << (vector - 128)));
- } else if (vector >= CYGNUM_HAL_INTERRUPT_GPIO64) {
- HAL_WRITE_UINT32(GEDRc, (1 << (vector - 96)));
- } else if (vector >= CYGNUM_HAL_INTERRUPT_GPIO32) {
- HAL_WRITE_UINT32(GEDRb, (1 << (vector - 64)));
- } else if (vector >= CYGNUM_HAL_INTERRUPT_GPIO2) {
- HAL_WRITE_UINT32(GEDRa, (1 << (vector - 32)));
- }
- break;
- }
- return;
-}
-
-void hal_interrupt_configure(int vector, int level, int up)
-{
-#if DEBUG_INT
- diag_printf("void hal_interrupt_configure(int vector, int level, int up) entered ...\n");
- diag_printf("vector = %d level = %d up = %d \n", vector, level, up);
-#endif
-#if 0
-#ifdef HAL_EXTENDED_INTERRUPT_CONFIGURE
- // Use platform specific handling, if defined
- // Note: this macro should do a 'return' for "extended" values of 'vector'
- // Normal vectors are handled by code subsequent to the macro call.
- HAL_EXTENDED_INTERRUPT_CONFIGURE(vector, level, up);
-#endif
- if (vector >= CYGNUM_HAL_INTERRUPT_GPIO64) {
- if (level) {
- if (up) {
- // Enable both edges
- *(unsigned long*)GRERc |= (1 << (vector - 96));
- *(unsigned long*)GFERc |= (1 << (vector - 96));
- } else {
- // Disable both edges
- *(unsigned long*)GRERc &= ~(1 << (vector - 96));
- *(unsigned long*)GFERc &= ~(1 << (vector - 96));
- }
- } else {
- // Only interested in one edge
- if (up) {
- // Set rising edge detect and clear falling edge detect.
- *(unsigned long*)GRERc |= (1 << (vector - 96));
- *(unsigned long*)GFERc &= ~(1 << (vector - 96));
- } else {
- // Set falling edge detect and clear rising edge detect.
- *(unsigned long*)GFERc |= (1 << (vector - 96));
- *(unsigned long*)GRERc &= ~(1 << (vector - 96));
- }
- }
- } else if (vector >= CYGNUM_HAL_INTERRUPT_GPIO32) {
- if (level) {
- if (up) {
- // Enable both edges
- *(unsigned long*)GRERb |= (1 << (vector - 64));
- *(unsigned long*)GFERb |= (1 << (vector - 64));
- } else {
- // Disable both edges
- *(unsigned long*)GRERb &= ~(1 << (vector - 64));
- *(unsigned long*)GFERb &= ~(1 << (vector - 64));
- }
- } else {
- // Only interested in one edge
- if (up) {
- // Set rising edge detect and clear falling edge detect.
- *(unsigned long*)GRERb |= (1 << (vector - 64));
- *(unsigned long*)GFERb &= ~(1 << (vector - 64));
- } else {
- // Set falling edge detect and clear rising edge detect.
- *(unsigned long*)GFERb |= (1 << (vector - 64));
- *(unsigned long*)GRERb &= ~(1 << (vector - 64));
- }
- }
- } else if (vector >= CYGNUM_HAL_INTERRUPT_GPIO2) {
- if (level) {
- if (up) {
- // Enable both edges
- *(unsigned long*)GRERa |= (1 << (vector - 32));
- *(unsigned long*)GFERa |= (1 << (vector - 32));
- } else {
- // Disable both edges
- *(unsigned long*)GRERa &= ~(1 << (vector - 32));
- *(unsigned long*)GFERa &= ~(1 << (vector - 32));
- }
- } else {
- // Only interested in one edge
- if (up) {
- // Set rising edge detect and clear falling edge detect.
- *(unsigned long*)GRERa |= (1 << (vector - 32));
- *(unsigned long*)GFERa &= ~(1 << (vector - 32));
- } else {
- // Set falling edge detect and clear rising edge detect.
- *(unsigned long*)GFERa |= (1 << (vector - 32));
- *(unsigned long*)GRERa &= ~(1 << (vector - 32));
- }
- }
- } else if (vector == CYGNUM_HAL_INTERRUPT_GPIO0 || vector == CYGNUM_HAL_INTERRUPT_GPIO1) {
- if (level) {
- if (up) {
- // Enable both edges
- *(unsigned long*)GRERa |= (1 << (vector - 8));
- *(unsigned long*)GFERa |= (1 << (vector - 8));
- } else {
- // Disable both edges
- *(unsigned long*)GRERa &= ~(1 << (vector - 8));
- *(unsigned long*)GFERa &= ~(1 << (vector - 8));
- }
- } else {
- // Only interested in one edge
- if (up) {
- // Set rising edge detect and clear falling edge detect.
- *(unsigned long*)GRERa |= (1 << (vector - 8));
- *(unsigned long*)GFERa &= ~(1 << (vector - 8));
- } else {
- // Set falling edge detect and clear rising edge detect.
- *(unsigned long*)GFERa |= (1 << (vector - 8));
- *(unsigned long*)GRERa &= ~(1 << (vector - 8));
- }
- }
- }
-#endif
-}
-
-void hal_interrupt_set_level(int vector, int level)
-{
-}
-
-/*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&*/
-/* Command and code to reset the hardware by issuing the reset vector */
-/*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&*/
-void cyg_hal_xscale_soft_reset(CYG_ADDRESS entry)
-{
- unsigned long value;
-
- diag_printf("\nDoing software reset now");
-
- // clear reset status
- HAL_WRITE_UINT32(RCSR, 0x0f);
-
- HAL_READ_UINT32(OSCR, value);
- value += 325000;
- HAL_WRITE_UINT32(OSMR3, value);
- HAL_WRITE_UINT32(OWER, 1);
- while (1) { // wait here for watchdog reset
- diag_printf(".");
- HAL_DELAY_US(10 * 1000);
- }
-}
-
-void do_triton_reset(int argc, char *argv[])
-{
- HAL_PLATFORM_RESET();
-}
-
-RedBoot_cmd("reset",
- "Reset the board/hardware",
- "",
- do_triton_reset
- );
-
-#ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS
-/*------------------------------------------------------------------------*/
-// HW Debug support
-
-static inline void set_ibcr0(unsigned x)
-{
- asm volatile ("mcr p15,0,%0,c14,c8,0" : : "r"(x));
-}
-
-static inline unsigned get_ibcr0(void)
-{
- unsigned x;
- asm volatile ("mrc p15,0,%0,c14,c8,0" : "=r"(x) :);
- return x;
-}
-
-static inline void set_ibcr1(unsigned x)
-{
- asm volatile ("mcr p15,0,%0,c14,c9,0" : : "r"(x));
-}
-
-static inline unsigned get_ibcr1(void)
-{
- unsigned x;
- asm volatile ("mrc p15,0,%0,c14,c9,0" : "=r"(x) :);
- return x;
-}
-
-static inline void set_dbr0(unsigned x)
-{
- asm volatile ("mcr p15,0,%0,c14,c0,0" : : "r"(x));
-}
-
-static inline unsigned get_dbr0(void)
-{
- unsigned x;
- asm volatile ("mrc p15,0,%0,c14,c0,0" : "=r"(x) :);
- return x;
-}
-
-static inline void set_dbr1(unsigned x)
-{
- asm volatile ("mcr p15,0,%0,c14,c3,0" : : "r"(x));
-}
-
-static inline unsigned get_dbr1(void)
-{
- unsigned x;
- asm volatile ("mrc p15,0,%0,c14,c3,0" : "=r"(x) :);
- return x;
-}
-
-static inline void set_dbcon(unsigned x)
-{
- asm volatile ("mcr p15,0,%0,c14,c4,0" : : "r"(x));
-}
-
-static inline unsigned get_dbcon(void)
-{
- unsigned x;
- asm volatile ("mrc p15,0,%0,c14,c4,0" : "=r"(x) :);
- return x;
-}
-
-static inline void set_dcsr(unsigned x)
-{
- asm volatile ("mcr p14,0,%0,c10,c0,0" : : "r"(x));
-}
-
-static inline unsigned get_dcsr(void)
-{
- unsigned x;
- asm volatile ("mrc p14,0,%0,c10,c0,0" : "=r"(x) :);
- return x;
-}
-
-int cyg_hal_plf_hw_breakpoint(int setflag, void *vaddr, int len)
-{
- unsigned int addr = (unsigned)vaddr;
-
- if (setflag) {
- if (!(get_ibcr0() & 1))
- set_ibcr0(addr | 1);
- else if (!(get_ibcr1() & 1))
- set_ibcr1(addr | 1);
- else
- return -1;
- } else {
- unsigned x = (addr | 1);
- if (get_ibcr0() == x)
- set_ibcr0(0);
- else if (get_ibcr0() == x)
- set_ibcr1(0);
- else
- return -1;
- }
- return 0;
-}
-
-int cyg_hal_plf_hw_watchpoint(int setflag, void *vaddr, int len, int type)
-{
- unsigned int mask, bit_nr, mode, addr = (unsigned)vaddr;
- unsigned dbcon = get_dbcon();
-
- mask = 0x80000000;
- bit_nr = 31;
- while (bit_nr) {
- if (len & mask)
- break;
- bit_nr--;
- mask >>= 1;
- }
- mask = ~(0xffffffff << bit_nr);
-
- if (setflag) {
- /* set a watchpoint */
- if (type == 2)
- mode = 1; // break on write
- else if (type == 3)
- mode = 3; // break on read
- else if (type == 4)
- mode = 2; // break on any access
- else
- return 1;
-
- if (!(dbcon & 3)) {
- set_dbr0(addr);
- set_dbr1(mask);
- set_dbcon(dbcon | mode | 0x100);
- } else
- return 1;
- } else {
- /* clear a watchpoint */
- if (dbcon & 3)
- set_dbcon(dbcon & ~3);
- else
- return 1;
- }
- return 0;
-}
-
-// Return indication of whether or not we stopped because of a
-// watchpoint or hardware breakpoint. If stopped by a watchpoint,
-// also set '*data_addr_p' to the data address which triggered the
-// watchpoint.
-int cyg_hal_plf_is_stopped_by_hardware(void **data_addr_p)
-{
- unsigned fsr, dcsr, dbcon, kind = 0;
-
- // Check for debug event
- asm volatile ("mrc p15,0,%0,c5,c0,0" : "=r"(fsr) :);
- if ((fsr & 0x200) == 0)
- return HAL_STUB_HW_STOP_NONE;
-
- // There was a debug event. Check the MOE for details
- dcsr = get_dcsr();
- switch ((dcsr >> 2) & 7) {
- case 1: // HW breakpoint
- return HAL_STUB_HW_STOP_BREAK;
- case 2: // Watchpoint
- dbcon = get_dbcon();
- if (dbcon & 0x100) {
- // dbr1 is used as address mask
- kind = dbcon & 3;
- *data_addr_p = (void *)get_dbr0();
- }
- if (kind == 1)
- return HAL_STUB_HW_STOP_WATCH;
- if (kind == 2)
- return HAL_STUB_HW_STOP_AWATCH;
- if (kind == 3)
- return HAL_STUB_HW_STOP_RWATCH;
- // should never get here
- break;
- }
- return HAL_STUB_HW_STOP_NONE;
-}
-#endif // CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS
-
-#define SCL_LOW (unsigned char)0x00
-#define SCL_HIGH (unsigned char)0x01
-#define SDA_LOW (unsigned char)0x00
-#define SDA_HIGH (unsigned char)0x02
-#define I2C_WRITE (unsigned char)0x00
-#define I2C_READ (unsigned char)0x01
-
-#define WRITE_REG32(__regadr, __val) ((__regadr) = (__val))
-#define READ_REG32(__regadr) (__regadr)
-
-#define PXA250_AFREG_BASE 0x40e00054
-#define PXA250_PINDIR_BASE 0x40e0000c
-#define PXA250_PINSET_BASE 0x40e00018
-#define PXA250_PINCLEAR_BASE 0x40e00024
-#define PXA250_REDGE_BASE 0x40e00030
-#define PXA250_FEDGE_BASE 0x40e0003c
-#define PXA250_DEDGE_BASE 0x40e00048
-#define PXA250_PINLEVEL_BASE 0x40e00000
-
-void pin_i2c_setup(pin_i2c_t *pin_data)
-{
- // configure pins as GPIO function
- set_alternate_function((unsigned char)pin_data->scl_no, 0);
- set_alternate_function((unsigned char)pin_data->sda_no, 0);
-
- // set both pins to input
- set_pin_dir((unsigned char)pin_data->scl_no, 0); /* 0=input 1=output */
- set_pin_dir((unsigned char)pin_data->sda_no, 0); /* 0=input 1=output */
-
- // clear all output registers
- clear_pin((unsigned char)pin_data->scl_no);
- clear_pin((unsigned char)pin_data->sda_no);
-}
-
-void bus_out(pin_i2c_t *pin_data, unsigned char pdata)
-{
- switch (pdata & 0x03) {
- case 0:
- set_pin_dir((unsigned char)pin_data->scl_no, 1); /* 0=input 1=output */
- set_pin_dir((unsigned char)pin_data->sda_no, 1); /* 0=input 1=output */
- break;
- case 1:
- set_pin_dir((unsigned char)pin_data->scl_no, 0); /* 0=input 1=output */
- set_pin_dir((unsigned char)pin_data->sda_no, 1); /* 0=input 1=output */
- break;
- case 2:
- set_pin_dir((unsigned char)pin_data->scl_no, 1); /* 0=input 1=output */
- set_pin_dir((unsigned char)pin_data->sda_no, 0); /* 0=input 1=output */
- break;
- case 3:
- set_pin_dir((unsigned char)pin_data->scl_no, 0); /* 0=input 1=output */
- set_pin_dir((unsigned char)pin_data->sda_no, 0); /* 0=input 1=output */
- break;
- }
- return;
-}
-
-int bus_in(pin_i2c_t *pin_data)
-{
- int result;
-
- result = get_pin_status((unsigned char)pin_data->sda_no);
- if (result < 0) {
- //dprintf("get_pin_status returned error \n");
- return 1;
- } else {
- return result;
- }
-}
-
-void i2c_start(pin_i2c_t *pin_data)
-{
- //dprintf("pin status is %d\n", get_pin_status((unsigned char)pin_data->sda_no));
-
- bus_out(pin_data, SCL_HIGH | SDA_LOW);
- HAL_DELAY_US(10);
-
- bus_out(pin_data, SCL_HIGH | SDA_HIGH);
- HAL_DELAY_US(10);
-
- bus_out(pin_data, SCL_HIGH | SDA_LOW);
- HAL_DELAY_US(10);
-
- bus_out(pin_data, SCL_LOW | SDA_LOW);
- HAL_DELAY_US(10);
-}
-
-void i2c_stop(pin_i2c_t *pin_data)
-{
- bus_out(pin_data, SCL_LOW | SDA_LOW);
- HAL_DELAY_US(10);
- bus_out(pin_data, SCL_HIGH | SDA_LOW);
- HAL_DELAY_US(10);
- bus_out(pin_data, SCL_HIGH | SDA_HIGH);
- HAL_DELAY_US(10);
-}
-
-int i2c_read_ack(pin_i2c_t *pin_data)
-{
- bus_out(pin_data, SCL_LOW | SDA_HIGH);
- HAL_DELAY_US(10);
- bus_out(pin_data, SCL_HIGH | SDA_HIGH);
- HAL_DELAY_US(10);
- if (bus_in(pin_data)) {
- bus_out(pin_data, SCL_LOW | SDA_HIGH);
- HAL_DELAY_US(10);
- return -2;
- } else {
- bus_out(pin_data, SCL_LOW | SDA_HIGH);
- HAL_DELAY_US(10);
- return 0;
- }
-}
-
-void i2c_write_ack(pin_i2c_t *pin_data)
-{
- bus_out(pin_data, SCL_LOW | SDA_LOW);
- HAL_DELAY_US(10);
- bus_out(pin_data, SCL_HIGH | SDA_LOW);
- HAL_DELAY_US(10);
- bus_out(pin_data, SCL_LOW | SDA_LOW);
- HAL_DELAY_US(10);
-}
-
-void i2c_write_nack(pin_i2c_t *pin_data)
-{
- bus_out(pin_data, SCL_LOW | SDA_HIGH);
- HAL_DELAY_US(10);
- bus_out(pin_data, SCL_HIGH | SDA_HIGH);
- HAL_DELAY_US(10);
- bus_out(pin_data, SCL_LOW | SDA_HIGH);
- HAL_DELAY_US(10);
-}
-
-void i2c_slave_addr(pin_i2c_t *pin_data, unsigned char dev, unsigned char mode)
-{
- i2c_write(pin_data, dev | mode);
-}
-
-void i2c_read(pin_i2c_t *pin_data, unsigned char *res)
-{
- unsigned char in = 0;
- unsigned char bit = 0x80;
-
- while (bit) {
- bus_out(pin_data, SCL_LOW | SDA_HIGH);
- HAL_DELAY_US(10);
- bus_out(pin_data, SCL_HIGH | SDA_HIGH);
- HAL_DELAY_US(10);
- if (bus_in(pin_data))
- in |= bit;
- bus_out(pin_data, SCL_LOW | SDA_HIGH);
- HAL_DELAY_US(10);
- bit >>= 1;
- }
- *res = in;
-}
-
-void i2c_write(pin_i2c_t *pin_data, unsigned char val)
-{
- unsigned char out;
- unsigned char bit = 0x80;
-
- while (bit) {
- out = (bit & val) ? SDA_HIGH : SDA_LOW;
- bus_out(pin_data, SCL_LOW | out);
- HAL_DELAY_US(10);
- bus_out(pin_data, SCL_HIGH | out);
- HAL_DELAY_US(10);
- bus_out(pin_data, SCL_LOW | out);
- HAL_DELAY_US(10);
- bit >>= 1;
- }
-}
-
-/* ================================================================ */
-/*
- function: se_read
-
- paramters: unsigned char addr start address in ser. EEPROM
- unsigned int numb number of bytes to be read
- char *dat pointer to data buffer
-
- ret. val.: int = 0, every thing ok
- else, device not av., or not ready
-
-*/
-int se_read(pin_i2c_t *pin_data, unsigned char addr, unsigned char dev_address,
- unsigned int numb, char *dat)
-{
- unsigned int i;
-
- i2c_start(pin_data);
- i2c_slave_addr(pin_data, dev_address, I2C_WRITE);
- if (i2c_read_ack(pin_data) < 0) {
- i2c_stop(pin_data);
- return -1;
- }
- i2c_write(pin_data, addr); /* read from start address */
- if (i2c_read_ack(pin_data) < 0) {
- i2c_stop(pin_data);
- return -1;
- }
-
- i2c_start(pin_data);
- i2c_slave_addr(pin_data, dev_address, I2C_READ);
- if (i2c_read_ack(pin_data) < 0) {
- i2c_stop(pin_data);
- return -1;
- }
-
- for (i = 0; i < numb - 1; i++) {
- i2c_read(pin_data, dat++);
- i2c_write_ack(pin_data);
- }
- i2c_read(pin_data, dat);
- i2c_stop(pin_data);
-
- return 0;
-}
-
-/* ================================================================ */
-/*
- function: se_write
-
- paramters: unsigned char addr start address in ser. EEPROM
- unsigned char val value to write
-
- ret. val.: int = 0, every thing ok
- else, device not av., or not ready
-
-*/
-int se_write(pin_i2c_t *pin_data, unsigned char addr,unsigned char dev_address, unsigned char val)
-{
- i2c_start(pin_data);
- i2c_slave_addr(pin_data, dev_address, I2C_WRITE);
- if (i2c_read_ack(pin_data) < 0) {
- i2c_stop(pin_data);
- return -1;
- }
- i2c_write(pin_data, addr);
- if (i2c_read_ack(pin_data) < 0) {
- i2c_stop(pin_data);
- return -1;
- }
- i2c_write(pin_data, val);
- if (i2c_read_ack(pin_data) < 0) {
- i2c_stop(pin_data);
- return -1;
- }
- i2c_stop(pin_data);
- HAL_DELAY_US(10000);
- return 0;
-}
-
-/* ================================================================ */
-/*
- function: ltc1663_pwrite
-
- paramters: unsigned dev_address device address of chip
- unsigned char command command byte
- unsigned short val value to write
-
- ret. val.: int = 0, every thing ok
- else, device not av., or not ready
-
-*/
-int ltc1663_write(pin_i2c_t *pin_data, unsigned char dev_address, unsigned char command,
- unsigned short val)
-{
- i2c_start(pin_data);
- i2c_slave_addr(pin_data, dev_address, I2C_WRITE);
- if (i2c_read_ack(pin_data) < 0) {
- i2c_stop(pin_data);
- return -1;
- }
- i2c_write(pin_data, command);
- if (i2c_read_ack(pin_data) < 0) {
- i2c_stop(pin_data);
- return -1;
- }
- i2c_write(pin_data, (unsigned char)val&0xff);
- if (i2c_read_ack(pin_data) < 0) {
- i2c_stop(pin_data);
- return -1;
- }
- i2c_write(pin_data, (unsigned char)((val&0xff00)>>8));
- if (i2c_read_ack(pin_data) < 0) {
- i2c_stop(pin_data);
- return -1;
- }
- i2c_stop(pin_data);
- HAL_DELAY_US(100);
- return 0;
-}
-
-// -----------------------------------------------------------------------
-int set_alternate_function(unsigned char gpio_number, unsigned char function_code)
-{
- unsigned int register_offset;
- unsigned int bit_offset;
- unsigned long mask;
- unsigned long reg_adr;
- unsigned long org_value;
- unsigned long new_value;
-
- // do some checking
- if (gpio_number >= NUM_GPIOS) {
- //dprintf("GPIO pin number %d is out of range!\n", gpio_number);
- return 0;
- }
-
- if (function_code > 3) {
- //dprintf("GPIO alternate function code %d is out of range\n", function_code);
- return 0;
- }
-
- register_offset = gpio_number / 16;
-
- bit_offset = gpio_number % 16;
- mask = 3 << (bit_offset*2);
-
- reg_adr = PXA250_AFREG_BASE + register_offset * 4;
-
- org_value = READ_REG32(reg_adr);
-
- new_value = (org_value & (~mask)) | (function_code << (bit_offset*2));
-
- WRITE_REG32(reg_adr, new_value);
- return 1;
-}
-
-int set_pin_dir(unsigned char gpio_number, unsigned char dir_code)
-{
- unsigned int register_offset;
- unsigned int bit_offset;
- unsigned long mask;
- unsigned long reg_adr;
- unsigned long org_value;
- unsigned long new_value;
-
- // do some checking
- if (gpio_number >= NUM_GPIOS) {
- //dprintf("GPIO pin number %d is out of range!\n", gpio_number);
- return 0;
- }
-
- if (dir_code > 1) {
- //dprintf("GPIO alternate function code %d is out of range\n", dir_code);
- return 0;
- }
-
- register_offset = gpio_number / 32;
-
- bit_offset = gpio_number % 32;
- mask = 1 << (bit_offset);
-
- reg_adr = PXA250_PINDIR_BASE + register_offset * 4;
-
- org_value = READ_REG32(reg_adr);
-
- new_value = (org_value & (~mask)) | (dir_code << (bit_offset));
-
- WRITE_REG32(reg_adr, new_value);
- return 1;
-}
-
-int set_rising_edge(unsigned char gpio_number, unsigned char edge_code)
-{
- unsigned int register_offset;
- unsigned int bit_offset;
- unsigned long mask;
- unsigned long reg_adr;
- unsigned long org_value;
- unsigned long new_value;
-
- // do some checking
- if (gpio_number >= NUM_GPIOS) {
- //dprintf("GPIO pin number %d is out of range!\n", gpio_number);
- return 0;
- }
- if (edge_code > 1) {
- //dprintf("rising edge value sould be 0 or 1, not %d\n", edge_code);
- return 0;
- }
- register_offset = gpio_number / 32;
-
- bit_offset = gpio_number % 32;
- mask = 1 << (bit_offset);
-
- reg_adr = PXA250_REDGE_BASE + register_offset * 4;
-
- org_value = READ_REG32(reg_adr);
-
- new_value = (org_value & (~mask)) | (edge_code << (bit_offset));
- WRITE_REG32(reg_adr, new_value);
- return 1;
-}
-
-int set_falling_edge(unsigned char gpio_number, unsigned char edge_code)
-{
- unsigned int register_offset;
- unsigned int bit_offset;
- unsigned long mask;
- unsigned long reg_adr;
- unsigned long org_value;
- unsigned long new_value;
-
- // do some checking
- if (gpio_number >= NUM_GPIOS) {
- //dprintf("GPIO pin number %d is out of range!\n", gpio_number);
- return 0;
- }
-
- if (edge_code > 1) {
- //dprintf("falling edge value sould be 0 or 1, not %d\n", edge_code);
- return 0;
- }
-
- register_offset = gpio_number / 32;
-
- bit_offset = gpio_number % 32;
- mask = 1 << (bit_offset);
-
- reg_adr = PXA250_FEDGE_BASE + register_offset * 4;
-
- org_value = READ_REG32(reg_adr);
-
- new_value = (org_value & (~mask)) | (edge_code << (bit_offset));
- WRITE_REG32(reg_adr, new_value);
- return 1;
-}
-
-int set_pin(unsigned char gpio_number)
-{
- unsigned int register_offset;
- unsigned int bit_offset;
- unsigned long mask;
- unsigned long reg_adr;
- unsigned long org_value;
- unsigned long new_value;
-
- // do some checking
- if (gpio_number >= NUM_GPIOS) {
- //dprintf("GPIO pin number %d is out of range!\n", gpio_number);
- return 0;
- }
-
- register_offset = gpio_number / 32;
-
- bit_offset = gpio_number % 32;
- mask = 1 << (bit_offset);
-
- reg_adr = PXA250_PINSET_BASE + register_offset * 4;
-
- org_value = 0;
-
- new_value = (org_value & (~mask)) | (1 << (bit_offset));
-
- WRITE_REG32(reg_adr, new_value);
- return 1;
-
-}
-
-int clear_pin(unsigned char gpio_number)
-{
- unsigned int register_offset;
- unsigned int bit_offset;
- unsigned long mask;
- unsigned long reg_adr;
- unsigned long org_value;
- unsigned long new_value;
-
- // do some checking
- if (gpio_number >= NUM_GPIOS) {
- //dprintf("GPIO pin number %d is out of range!\n", gpio_number);
- return 0;
- }
-
- register_offset = gpio_number / 32;
-
- bit_offset = gpio_number % 32;
- mask = 1 << (bit_offset);
-
- reg_adr = PXA250_PINCLEAR_BASE + register_offset * 4;
-
- org_value = 0;
-
- new_value = (org_value & (~mask)) | (1 << (bit_offset));
-
- WRITE_REG32(reg_adr, new_value);
- return 1;
-
-}
-
-int get_pin_status(unsigned char gpio_number)
-{
- unsigned int register_offset;
- unsigned int bit_offset;
- unsigned long mask;
- unsigned long reg_adr;
- unsigned long return_value;
-
- // do some checking
- if (gpio_number >= NUM_GPIOS) {
- //dprintf("GPIO pin number %d is out of range!\n", gpio_number);
- return -1;
- }
-
- register_offset = gpio_number / 32;
-
- bit_offset = gpio_number % 32;
- mask = 1 << (bit_offset);
-
- reg_adr = PXA250_PINLEVEL_BASE + register_offset * 4;
-
- return_value = (READ_REG32(reg_adr) & mask) >> bit_offset;
-
- return return_value;
-}
-
-int clear_edge(unsigned char gpio_number)
-{
- unsigned int register_offset;
- unsigned int bit_offset;
- unsigned long mask;
- unsigned long reg_adr;
- unsigned long org_value;
- unsigned long new_value;
-
- // do some checking
- if (gpio_number >= NUM_GPIOS) {
- //dprintf("GPIO pin number %d is out of range!\n", gpio_number);
- return 0;
- }
-
- register_offset = gpio_number / 32;
-
- bit_offset = gpio_number % 32;
- mask = 1 << (bit_offset);
-
- reg_adr = PXA250_DEDGE_BASE + register_offset * 4;
-
- org_value = READ_REG32(reg_adr);
-
- new_value = (org_value & (~mask)) | (1 << (bit_offset));
- WRITE_REG32(reg_adr, new_value);
-
- return 1;
-}
-
-int detect_edge(unsigned char gpio_number)
-{
- unsigned int register_offset;
- unsigned int bit_offset;
- unsigned long mask;
- unsigned long reg_adr;
- unsigned long org_value;
-
- // do some checking
- if (gpio_number >= NUM_GPIOS) {
- //dprintf("GPIO pin number %d is out of range!\n", gpio_number);
- return 0;
- }
-
- register_offset = gpio_number / 32;
-
- bit_offset = gpio_number % 32;
- mask = 1 << (bit_offset);
-
- reg_adr = PXA250_DEDGE_BASE + register_offset * 4;
-
- org_value = READ_REG32(reg_adr);
-
- return !!(org_value & mask);
-}
-
-void init_i2c(void)
-{
- HAL_WRITE_UINT32(ICR, ICR_UR); // reset i2c_unit;
- HAL_WRITE_UINT32(ICR, ICR_IUE | ICR_SCLE | ICR_GCD);
-}
-
-//FIXME: insert timeout into while loop
-cyg_int32 write_i2c_pcf8574(cyg_uint8 device_adr, cyg_uint8 dat_value)
-{
- cyg_uint32 value;
- unsigned int retries;
-
-// write device address now
- HAL_WRITE_UINT32(IDBR, (device_adr & 0xfe));
- HAL_READ_UINT32(ICR, value);
- value = value & ~(ICR_STOP | ICR_ALDIE);
- HAL_WRITE_UINT32(ICR, value | ICR_START | ICR_TB);
-
- HAL_READ_UINT32(ISR, value);
- value &= ISR_ITE;
- while (!value) { // wait for Transmit Empty
- HAL_READ_UINT32(ISR, value);
- value &= ISR_ITE;
- }
- HAL_READ_UINT32(ISR, value);
- if (value & ISR_BED) {
-
- //diag_printf("I2C: bus error, status after write device address is: %06X\n", value);
- HAL_READ_UINT32(ICR, value);
- HAL_WRITE_UINT32(ICR, value | ICR_MA); // send master abort
- HAL_DELAY_US(10000);
- HAL_WRITE_UINT32(ICR, value & ~ICR_MA);
- return -1;
- }
- HAL_WRITE_UINT32(ISR, ISR_ITE); // clear ITE status
-
-// write data now
- HAL_WRITE_UINT32(IDBR, (dat_value & 0xff));
- HAL_READ_UINT32(ICR, value);
- value &= ~ICR_START;
- HAL_WRITE_UINT32(ICR, value | ICR_TB | ICR_STOP);
-
- HAL_READ_UINT32(ISR, value);
- retries = 1000000;
- while (!(value & ISR_ITE)) { // wait for Transmit Empty
- HAL_READ_UINT32(ISR, value);
- }
- if (!(value & ISR_ITE)) {
- diag_printf("I2C: timeout waiting for ITE\n");
- return -1;
- }
- if (value & ISR_BED) {
- //diag_printf("I2C: bus error, status after write device address is: %06X\n", value);
- HAL_READ_UINT32(ICR, value);
- HAL_WRITE_UINT32(ICR, value | ICR_MA); // send master abort
- HAL_DELAY_US(10000);
- HAL_WRITE_UINT32(ICR, value & ~ICR_MA);
- return -1;
- }
- HAL_WRITE_UINT32(ISR, ISR_ITE); // clear ITE status
-
- HAL_READ_UINT32(ICR, value);
- value = value & ~(ICR_STOP | ICR_START | ICR_TB);
- HAL_WRITE_UINT32(ICR, value);
-
- return 0;
-}
-
-//FIXME: insert timeout into while loop
-cyg_int32 read_i2c_pcf8574(cyg_uint8 device_adr)
-{
- cyg_uint32 value;
- unsigned int retries;
-
- // write device address now
- HAL_WRITE_UINT32(IDBR, (device_adr | 0x01));
-
- HAL_READ_UINT32(ICR, value);
- value &= ~ICR_STOP;
- HAL_WRITE_UINT32(ICR, value | ICR_START | ICR_TB);
-
- HAL_READ_UINT32(ISR, value);
- retries = 1000000;
- while (!(value & ISR_ITE)) { // wait for Transmit Empty
- HAL_READ_UINT32(ISR, value);
- }
- if (!(value & ISR_ITE)) {
- diag_printf("I2C: timeout waiting for ITE\n");
- return -1;
- }
- if (value & ISR_BED) {
- //diag_printf("I2C: bus error, status after write device address is: %06X\n", value);
- HAL_READ_UINT32(ICR, value);
- HAL_WRITE_UINT32(ICR, value | ICR_MA); // send master abort
- HAL_DELAY_US(10000);
- HAL_WRITE_UINT32(ICR, value & ~ICR_MA);
- return -1;
- }
- HAL_WRITE_UINT32(ISR, ISR_ITE); // clear ITE status
-
- // read data now
- HAL_READ_UINT32(ICR, value);
- value &= ~ICR_START;
- HAL_WRITE_UINT32(ICR, value |ICR_TB | ICR_STOP | ICR_ACKNAK);
-
- HAL_READ_UINT32(ISR, value);
- value &= ISR_IRF;
- while (!value) { // wait for Receive Buffer full
- HAL_READ_UINT32(ISR, value);
- value &= ISR_IRF;
- }
-
- HAL_WRITE_UINT32(ISR, ISR_IRF); // clear ITE status
-
- HAL_READ_UINT32(ICR, value);
- value = value & ~(ICR_STOP | ICR_START | ICR_TB | ICR_ACKNAK);
- HAL_WRITE_UINT32(ICR, value);
-
- HAL_READ_UINT32(IDBR, value);
-
- return value & 0xff;
-}
-/*------------------------------------------------------------------------*/
-// EOF triton270_misc.c
projects / karo-tx-redboot.git / blobdiff