Merge branch 'next'

[karo-tx-uboot.git] / post / lib_ppc / asm.S

diff --git a/post/lib_ppc/asm.S b/post/lib_ppc/asm.S
index a0815a43a7721424511e351794fa5ad28356b7a6..f6b329aa4df2592f0f52466a2f5ac1fc738a6a63 100644 (file)
--- a/post/lib_ppc/asm.S
+++ b/post/lib_ppc/asm.S
@@ -22,18 +22,17 @@
 
 #include <config.h>
 
-#ifdef CONFIG_POST
-
 #include <post.h>
 #include <ppc_asm.tmpl>
 #include <ppc_defs.h>
 #include <asm/cache.h>
 
-#if CONFIG_POST & CFG_POST_CPU
+#if CONFIG_POST & CONFIG_SYS_POST_CPU
 
 /* void cpu_post_exec_02 (ulong *code, ulong op1, ulong op2); */
        .global cpu_post_exec_02
 cpu_post_exec_02:
+       isync
        mflr    r0
        stwu    r0, -4(r1)
 
@@ -56,6 +55,7 @@ cpu_post_exec_02:
 /* void cpu_post_exec_04 (ulong *code, ulong op1, ulong op2, ulong op3, ulong op4); */
        .global cpu_post_exec_04
 cpu_post_exec_04:
+       isync
        mflr    r0
        stwu    r0, -4(r1)
 
@@ -80,6 +80,7 @@ cpu_post_exec_04:
 /* void cpu_post_exec_12 (ulong *code, ulong *res, ulong op1, ulong op2); */
        .global cpu_post_exec_12
 cpu_post_exec_12:
+       isync
        mflr    r0
        stwu    r0, -4(r1)
        stwu    r4, -4(r1)
@@ -100,6 +101,7 @@ cpu_post_exec_12:
 /* void cpu_post_exec_11 (ulong *code, ulong *res, ulong op1); */
        .global cpu_post_exec_11
 cpu_post_exec_11:
+       isync
        mflr    r0
        stwu    r0, -4(r1)
        stwu    r4, -4(r1)
@@ -119,6 +121,7 @@ cpu_post_exec_11:
 /* void cpu_post_exec_21 (ulong *code, ulong *cr, ulong *res, ulong op1); */
        .global cpu_post_exec_21
 cpu_post_exec_21:
+       isync
        mflr    r0
        stwu    r0, -4(r1)
        stwu    r4, -4(r1)
@@ -148,6 +151,7 @@ cpu_post_exec_21:
     ulong op2); */
        .global cpu_post_exec_22
 cpu_post_exec_22:
+       isync
        mflr    r0
        stwu    r0, -4(r1)
        stwu    r4, -4(r1)
@@ -177,6 +181,7 @@ cpu_post_exec_22:
 /* void cpu_post_exec_12w (ulong *code, ulong *op1, ulong op2, ulong op3); */
        .global cpu_post_exec_12w
 cpu_post_exec_12w:
+       isync
        mflr    r0
        stwu    r0, -4(r1)
        stwu    r4, -4(r1)
@@ -198,6 +203,7 @@ cpu_post_exec_12w:
 /* void cpu_post_exec_11w (ulong *code, ulong *op1, ulong op2); */
        .global cpu_post_exec_11w
 cpu_post_exec_11w:
+       isync
        mflr    r0
        stwu    r0, -4(r1)
        stwu    r4, -4(r1)
@@ -218,6 +224,7 @@ cpu_post_exec_11w:
 /* void cpu_post_exec_22w (ulong *code, ulong *op1, ulong op2, ulong *op3); */
        .global cpu_post_exec_22w
 cpu_post_exec_22w:
+       isync
        mflr    r0
        stwu    r0, -4(r1)
        stwu    r4, -4(r1)
@@ -241,6 +248,7 @@ cpu_post_exec_22w:
 /* void cpu_post_exec_21w (ulong *code, ulong *op1, ulong *op2); */
        .global cpu_post_exec_21w
 cpu_post_exec_21w:
+       isync
        mflr    r0
        stwu    r0, -4(r1)
        stwu    r4, -4(r1)
@@ -263,6 +271,7 @@ cpu_post_exec_21w:
 /* void cpu_post_exec_21x (ulong *code, ulong *op1, ulong *op2, ulong op3); */
        .global cpu_post_exec_21x
 cpu_post_exec_21x:
+       isync
        mflr    r0
        stwu    r0, -4(r1)
        stwu    r4, -4(r1)
@@ -286,6 +295,7 @@ cpu_post_exec_21x:
     ulong cr); */
        .global cpu_post_exec_31
 cpu_post_exec_31:
+       isync
        mflr    r0
        stwu    r0, -4(r1)
        stwu    r4, -4(r1)
@@ -296,7 +306,10 @@ cpu_post_exec_31:
        lwz     r3, 0(r4)
        lwz     r4, 0(r5)
        mr      r6, r7
+
+       mfcr    r7
        blrl
+       mtcr    r7
 
        lwz     r7, 8(r1)
        stw     r3, 0(r7)
@@ -343,4 +356,3 @@ cpu_post_complex_2_loop:
 blr
 
 #endif
-#endif