#define ICH6_INT_CTRL_EN 0x40000000 /* controller interrupt enable bit */
#define ICH6_INT_GLOBAL_EN 0x80000000 /* global interrupt enable bit */
+/* GCTL unsolicited response enable bit */
+#define ICH6_GCTL_UREN (1<<8)
+
/* GCTL reset bit */
#define ICH6_GCTL_RESET (1<<0)
return -EBUSY;
}
+ /* Accept unsolicited responses */
+ azx_writel(chip, GCTL, azx_readl(chip, GCTL) | ICH6_GCTL_UREN);
+
/* detect codecs */
if (! chip->codec_mask) {
chip->codec_mask = azx_readw(chip, STATESTS);