ASoC: rsnd: rsnd_write() / rsnd_bset() uses regmap _force_ function

[karo-tx-linux.git] / sound / soc / sh / rcar / gen.c

diff --git a/sound/soc/sh/rcar/gen.c b/sound/soc/sh/rcar/gen.c
index ea24247eba73c2fffc8bfdb4c56f2c6d7c9268c5..46c0ba7b6414944ad6d5887735ec7ccce93c80c5 100644 (file)
--- a/sound/soc/sh/rcar/gen.c
+++ b/sound/soc/sh/rcar/gen.c
@@ -101,23 +101,6 @@ void rsnd_write(struct rsnd_priv *priv,
        struct device *dev = rsnd_priv_to_dev(priv);
        struct rsnd_gen *gen = rsnd_priv_to_gen(priv);
 
-       if (!rsnd_is_accessible_reg(priv, gen, reg))
-               return;
-
-       regmap_fields_write(gen->regs[reg], rsnd_mod_id(mod), data);
-
-       dev_dbg(dev, "w %s[%d] - %-18s (%4d) : %08x\n",
-               rsnd_mod_name(mod), rsnd_mod_id(mod),
-               rsnd_reg_name(gen, reg), reg, data);
-}
-
-void rsnd_force_write(struct rsnd_priv *priv,
-                     struct rsnd_mod *mod,
-                     enum rsnd_reg reg, u32 data)
-{
-       struct device *dev = rsnd_priv_to_dev(priv);
-       struct rsnd_gen *gen = rsnd_priv_to_gen(priv);
-
        if (!rsnd_is_accessible_reg(priv, gen, reg))
                return;
 
@@ -137,8 +120,8 @@ void rsnd_bset(struct rsnd_priv *priv, struct rsnd_mod *mod,
        if (!rsnd_is_accessible_reg(priv, gen, reg))
                return;
 
-       regmap_fields_update_bits(gen->regs[reg], rsnd_mod_id(mod),
-                                 mask, data);
+       regmap_fields_force_update_bits(gen->regs[reg],
+                                       rsnd_mod_id(mod), mask, data);
 
        dev_dbg(dev, "b %s[%d] - %-18s (%4d) : %08x/%08x\n",
                rsnd_mod_name(mod), rsnd_mod_id(mod),
@@ -260,8 +243,43 @@ static int rsnd_gen2_probe(struct rsnd_priv *priv)
                RSND_GEN_M_REG(SRC_SRCCR,       0x224,  0x40),
                RSND_GEN_M_REG(SRC_BSDSR,       0x22c,  0x40),
                RSND_GEN_M_REG(SRC_BSISR,       0x238,  0x40),
+               RSND_GEN_M_REG(CTU_SWRSR,       0x500,  0x100),
                RSND_GEN_M_REG(CTU_CTUIR,       0x504,  0x100),
                RSND_GEN_M_REG(CTU_ADINR,       0x508,  0x100),
+               RSND_GEN_M_REG(CTU_CPMDR,       0x510,  0x100),
+               RSND_GEN_M_REG(CTU_SCMDR,       0x514,  0x100),
+               RSND_GEN_M_REG(CTU_SV00R,       0x518,  0x100),
+               RSND_GEN_M_REG(CTU_SV01R,       0x51c,  0x100),
+               RSND_GEN_M_REG(CTU_SV02R,       0x520,  0x100),
+               RSND_GEN_M_REG(CTU_SV03R,       0x524,  0x100),
+               RSND_GEN_M_REG(CTU_SV04R,       0x528,  0x100),
+               RSND_GEN_M_REG(CTU_SV05R,       0x52c,  0x100),
+               RSND_GEN_M_REG(CTU_SV06R,       0x530,  0x100),
+               RSND_GEN_M_REG(CTU_SV07R,       0x534,  0x100),
+               RSND_GEN_M_REG(CTU_SV10R,       0x538,  0x100),
+               RSND_GEN_M_REG(CTU_SV11R,       0x53c,  0x100),
+               RSND_GEN_M_REG(CTU_SV12R,       0x540,  0x100),
+               RSND_GEN_M_REG(CTU_SV13R,       0x544,  0x100),
+               RSND_GEN_M_REG(CTU_SV14R,       0x548,  0x100),
+               RSND_GEN_M_REG(CTU_SV15R,       0x54c,  0x100),
+               RSND_GEN_M_REG(CTU_SV16R,       0x550,  0x100),
+               RSND_GEN_M_REG(CTU_SV17R,       0x554,  0x100),
+               RSND_GEN_M_REG(CTU_SV20R,       0x558,  0x100),
+               RSND_GEN_M_REG(CTU_SV21R,       0x55c,  0x100),
+               RSND_GEN_M_REG(CTU_SV22R,       0x560,  0x100),
+               RSND_GEN_M_REG(CTU_SV23R,       0x564,  0x100),
+               RSND_GEN_M_REG(CTU_SV24R,       0x568,  0x100),
+               RSND_GEN_M_REG(CTU_SV25R,       0x56c,  0x100),
+               RSND_GEN_M_REG(CTU_SV26R,       0x570,  0x100),
+               RSND_GEN_M_REG(CTU_SV27R,       0x574,  0x100),
+               RSND_GEN_M_REG(CTU_SV30R,       0x578,  0x100),
+               RSND_GEN_M_REG(CTU_SV31R,       0x57c,  0x100),
+               RSND_GEN_M_REG(CTU_SV32R,       0x580,  0x100),
+               RSND_GEN_M_REG(CTU_SV33R,       0x584,  0x100),
+               RSND_GEN_M_REG(CTU_SV34R,       0x588,  0x100),
+               RSND_GEN_M_REG(CTU_SV35R,       0x58c,  0x100),
+               RSND_GEN_M_REG(CTU_SV36R,       0x590,  0x100),
+               RSND_GEN_M_REG(CTU_SV37R,       0x594,  0x100),
                RSND_GEN_M_REG(MIX_SWRSR,       0xd00,  0x40),
                RSND_GEN_M_REG(MIX_MIXIR,       0xd04,  0x40),
                RSND_GEN_M_REG(MIX_ADINR,       0xd08,  0x40),