]> git.karo-electronics.de Git - karo-tx-linux.git/blobdiff - virt/kvm/arm/hyp/vgic-v3-sr.c
Merge branch 'i2c/for-current' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa...
[karo-tx-linux.git] / virt / kvm / arm / hyp / vgic-v3-sr.c
index 3947095cc0a1cec88e2ad2f5fa3a3e5ea81111c1..32c3295929b01b47d2071f372a458fa7b8e5d60d 100644 (file)
@@ -22,7 +22,7 @@
 #include <asm/kvm_hyp.h>
 
 #define vtr_to_max_lr_idx(v)           ((v) & 0xf)
-#define vtr_to_nr_pri_bits(v)          (((u32)(v) >> 29) + 1)
+#define vtr_to_nr_pre_bits(v)          (((u32)(v) >> 26) + 1)
 
 static u64 __hyp_text __gic_v3_get_lr(unsigned int lr)
 {
@@ -118,66 +118,32 @@ static void __hyp_text __gic_v3_set_lr(u64 val, int lr)
        }
 }
 
-static void __hyp_text save_maint_int_state(struct kvm_vcpu *vcpu, int nr_lr)
-{
-       struct vgic_v3_cpu_if *cpu_if = &vcpu->arch.vgic_cpu.vgic_v3;
-       int i;
-       bool expect_mi;
-
-       expect_mi = !!(cpu_if->vgic_hcr & ICH_HCR_UIE);
-
-       for (i = 0; i < nr_lr; i++) {
-               if (!(vcpu->arch.vgic_cpu.live_lrs & (1UL << i)))
-                               continue;
-
-               expect_mi |= (!(cpu_if->vgic_lr[i] & ICH_LR_HW) &&
-                             (cpu_if->vgic_lr[i] & ICH_LR_EOI));
-       }
-
-       if (expect_mi) {
-               cpu_if->vgic_misr  = read_gicreg(ICH_MISR_EL2);
-
-               if (cpu_if->vgic_misr & ICH_MISR_EOI)
-                       cpu_if->vgic_eisr = read_gicreg(ICH_EISR_EL2);
-               else
-                       cpu_if->vgic_eisr = 0;
-       } else {
-               cpu_if->vgic_misr = 0;
-               cpu_if->vgic_eisr = 0;
-       }
-}
-
 void __hyp_text __vgic_v3_save_state(struct kvm_vcpu *vcpu)
 {
        struct vgic_v3_cpu_if *cpu_if = &vcpu->arch.vgic_cpu.vgic_v3;
+       u64 used_lrs = vcpu->arch.vgic_cpu.used_lrs;
        u64 val;
 
        /*
         * Make sure stores to the GIC via the memory mapped interface
         * are now visible to the system register interface.
         */
-       if (!cpu_if->vgic_sre)
+       if (!cpu_if->vgic_sre) {
                dsb(st);
+               cpu_if->vgic_vmcr = read_gicreg(ICH_VMCR_EL2);
+       }
 
-       cpu_if->vgic_vmcr  = read_gicreg(ICH_VMCR_EL2);
-
-       if (vcpu->arch.vgic_cpu.live_lrs) {
+       if (used_lrs) {
                int i;
-               u32 max_lr_idx, nr_pri_bits;
+               u32 nr_pre_bits;
 
                cpu_if->vgic_elrsr = read_gicreg(ICH_ELSR_EL2);
 
                write_gicreg(0, ICH_HCR_EL2);
                val = read_gicreg(ICH_VTR_EL2);
-               max_lr_idx = vtr_to_max_lr_idx(val);
-               nr_pri_bits = vtr_to_nr_pri_bits(val);
-
-               save_maint_int_state(vcpu, max_lr_idx + 1);
-
-               for (i = 0; i <= max_lr_idx; i++) {
-                       if (!(vcpu->arch.vgic_cpu.live_lrs & (1UL << i)))
-                               continue;
+               nr_pre_bits = vtr_to_nr_pre_bits(val);
 
+               for (i = 0; i < used_lrs; i++) {
                        if (cpu_if->vgic_elrsr & (1 << i))
                                cpu_if->vgic_lr[i] &= ~ICH_LR_STATE;
                        else
@@ -186,7 +152,7 @@ void __hyp_text __vgic_v3_save_state(struct kvm_vcpu *vcpu)
                        __gic_v3_set_lr(0, i);
                }
 
-               switch (nr_pri_bits) {
+               switch (nr_pre_bits) {
                case 7:
                        cpu_if->vgic_ap0r[3] = read_gicreg(ICH_AP0R3_EL2);
                        cpu_if->vgic_ap0r[2] = read_gicreg(ICH_AP0R2_EL2);
@@ -196,7 +162,7 @@ void __hyp_text __vgic_v3_save_state(struct kvm_vcpu *vcpu)
                        cpu_if->vgic_ap0r[0] = read_gicreg(ICH_AP0R0_EL2);
                }
 
-               switch (nr_pri_bits) {
+               switch (nr_pre_bits) {
                case 7:
                        cpu_if->vgic_ap1r[3] = read_gicreg(ICH_AP1R3_EL2);
                        cpu_if->vgic_ap1r[2] = read_gicreg(ICH_AP1R2_EL2);
@@ -205,11 +171,7 @@ void __hyp_text __vgic_v3_save_state(struct kvm_vcpu *vcpu)
                default:
                        cpu_if->vgic_ap1r[0] = read_gicreg(ICH_AP1R0_EL2);
                }
-
-               vcpu->arch.vgic_cpu.live_lrs = 0;
        } else {
-               cpu_if->vgic_misr  = 0;
-               cpu_if->vgic_eisr  = 0;
                cpu_if->vgic_elrsr = 0xffff;
                cpu_if->vgic_ap0r[0] = 0;
                cpu_if->vgic_ap0r[1] = 0;
@@ -234,9 +196,9 @@ void __hyp_text __vgic_v3_save_state(struct kvm_vcpu *vcpu)
 void __hyp_text __vgic_v3_restore_state(struct kvm_vcpu *vcpu)
 {
        struct vgic_v3_cpu_if *cpu_if = &vcpu->arch.vgic_cpu.vgic_v3;
+       u64 used_lrs = vcpu->arch.vgic_cpu.used_lrs;
        u64 val;
-       u32 max_lr_idx, nr_pri_bits;
-       u16 live_lrs = 0;
+       u32 nr_pre_bits;
        int i;
 
        /*
@@ -245,28 +207,22 @@ void __hyp_text __vgic_v3_restore_state(struct kvm_vcpu *vcpu)
         * delivered as a FIQ to the guest, with potentially fatal
         * consequences. So we must make sure that ICC_SRE_EL1 has
         * been actually programmed with the value we want before
-        * starting to mess with the rest of the GIC.
+        * starting to mess with the rest of the GIC, and VMCR_EL2 in
+        * particular.
         */
        if (!cpu_if->vgic_sre) {
                write_gicreg(0, ICC_SRE_EL1);
                isb();
+               write_gicreg(cpu_if->vgic_vmcr, ICH_VMCR_EL2);
        }
 
        val = read_gicreg(ICH_VTR_EL2);
-       max_lr_idx = vtr_to_max_lr_idx(val);
-       nr_pri_bits = vtr_to_nr_pri_bits(val);
+       nr_pre_bits = vtr_to_nr_pre_bits(val);
 
-       for (i = 0; i <= max_lr_idx; i++) {
-               if (cpu_if->vgic_lr[i] & ICH_LR_STATE)
-                       live_lrs |= (1 << i);
-       }
-
-       write_gicreg(cpu_if->vgic_vmcr, ICH_VMCR_EL2);
-
-       if (live_lrs) {
+       if (used_lrs) {
                write_gicreg(cpu_if->vgic_hcr, ICH_HCR_EL2);
 
-               switch (nr_pri_bits) {
+               switch (nr_pre_bits) {
                case 7:
                        write_gicreg(cpu_if->vgic_ap0r[3], ICH_AP0R3_EL2);
                        write_gicreg(cpu_if->vgic_ap0r[2], ICH_AP0R2_EL2);
@@ -276,7 +232,7 @@ void __hyp_text __vgic_v3_restore_state(struct kvm_vcpu *vcpu)
                        write_gicreg(cpu_if->vgic_ap0r[0], ICH_AP0R0_EL2);
                }
 
-               switch (nr_pri_bits) {
+               switch (nr_pre_bits) {
                case 7:
                        write_gicreg(cpu_if->vgic_ap1r[3], ICH_AP1R3_EL2);
                        write_gicreg(cpu_if->vgic_ap1r[2], ICH_AP1R2_EL2);
@@ -286,12 +242,8 @@ void __hyp_text __vgic_v3_restore_state(struct kvm_vcpu *vcpu)
                        write_gicreg(cpu_if->vgic_ap1r[0], ICH_AP1R0_EL2);
                }
 
-               for (i = 0; i <= max_lr_idx; i++) {
-                       if (!(live_lrs & (1 << i)))
-                               continue;
-
+               for (i = 0; i < used_lrs; i++)
                        __gic_v3_set_lr(cpu_if->vgic_lr[i], i);
-               }
        }
 
        /*
@@ -303,7 +255,6 @@ void __hyp_text __vgic_v3_restore_state(struct kvm_vcpu *vcpu)
                isb();
                dsb(sy);
        }
-       vcpu->arch.vgic_cpu.live_lrs = live_lrs;
 
        /*
         * Prevent the guest from touching the GIC system registers if
@@ -326,3 +277,13 @@ u64 __hyp_text __vgic_v3_get_ich_vtr_el2(void)
 {
        return read_gicreg(ICH_VTR_EL2);
 }
+
+u64 __hyp_text __vgic_v3_read_vmcr(void)
+{
+       return read_gicreg(ICH_VMCR_EL2);
+}
+
+void __hyp_text __vgic_v3_write_vmcr(u32 vmcr)
+{
+       write_gicreg(vmcr, ICH_VMCR_EL2);
+}