X-Git-Url: https://git.karo-electronics.de/?a=blobdiff_plain;ds=sidebyside;f=include%2Fconfigs%2Ftx6.h;h=146f22040b1a33ba7dfd6a084db5474773814cb1;hb=3054d43b45eff6d66e4e11341c94a01f67765905;hp=52ca7a705de4387ce0c1607f4eea0b9a6cd65ac4;hpb=2754c40edd8e0f7d3fd5d86d3931bac84cf00725;p=karo-tx-uboot.git diff --git a/include/configs/tx6.h b/include/configs/tx6.h index 52ca7a705d..146f22040b 100644 --- a/include/configs/tx6.h +++ b/include/configs/tx6.h @@ -8,7 +8,7 @@ #ifndef __CONFIG_H #define __CONFIG_H -#ifndef CONFIG_SOC_MX6UL +#ifndef CONFIG_BOARD_TX6UL #define CONFIG_ARM_ERRATA_743622 #define CONFIG_ARM_ERRATA_751472 #define CONFIG_ARM_ERRATA_794072 @@ -47,13 +47,13 @@ #ifdef CONFIG_LCD #define CONFIG_SPLASH_SCREEN #define CONFIG_SPLASH_SCREEN_ALIGN -#ifndef CONFIG_SOC_MX6UL +#ifndef CONFIG_BOARD_TX6UL #define CONFIG_VIDEO_IPUV3 #define CONFIG_IPUV3_CLK (CONFIG_SYS_SDRAM_CLK * 1000000 / 2) #else #define CONFIG_VIDEO_MXS #define MXS_LCDIF_BASE 0x021c8000UL -#endif /* CONFIG_SOC_MX6UL */ +#endif /* CONFIG_BOARD_TX6UL */ #define CONFIG_LCD_LOGO #define LCD_BPP LCD_COLOR32 #define CONFIG_CMD_BMP @@ -68,13 +68,19 @@ * Memory configuration options */ #define CONFIG_NR_DRAM_BANKS 0x1 /* # of SDRAM banks */ +#ifndef CONFIG_BOARD_TX6UL +/* Base address of SDRAM bank 1 */ +#define PHYS_SDRAM_1 0x10000000 +#else +#define PHYS_SDRAM_1 0x80000000 +#endif + #ifndef CONFIG_SOC_MX6UL -#define PHYS_SDRAM_1 0x10000000 /* Base address of bank 1 */ #define CONFIG_SYS_MPU_CLK 792 #else -#define PHYS_SDRAM_1 0x80000000 /* Base address of bank 1 */ #define CONFIG_SYS_MPU_CLK 528 #endif + #ifndef CONFIG_SYS_SDRAM_BUS_WIDTH #if defined(CONFIG_SYS_SDRAM_BUS_WIDTH_32) #define CONFIG_SYS_SDRAM_BUS_WIDTH 32 @@ -84,7 +90,21 @@ #define CONFIG_SYS_SDRAM_BUS_WIDTH 64 #endif #endif /* CONFIG_SYS_SDRAM_BUS_WIDTH */ -#define PHYS_SDRAM_1_SIZE (SZ_512M / 32 * CONFIG_SYS_SDRAM_BUS_WIDTH) +#ifdef __ASSEMBLY__ +#define _AC(x,s) x +#else +#define _AC(x,s) (x##s) +#endif +#define UL(x) _AC(x,UL) +#define PHYS_SDRAM_1_SIZE (UL(CONFIG_SYS_SDRAM_CHIP_SIZE) * \ + SZ_1M / 32 * \ + CONFIG_SYS_SDRAM_BUS_WIDTH) +#if PHYS_SDRAM_1_SIZE > SZ_1G +#define FDT_HIGH_STR "fdt_high=ffffffff\0" +#else +#define FDT_HIGH_STR "" +#endif + #ifdef CONFIG_SOC_MX6Q #define CONFIG_SYS_SDRAM_CLK 528 #else @@ -104,6 +124,7 @@ #elif defined(CONFIG_SOC_MX6DL) #elif defined(CONFIG_SOC_MX6S) #elif defined(CONFIG_SOC_MX6UL) +#elif defined(CONFIG_SOC_MX6ULL) #else #error Unsupported i.MX6 processor variant #endif @@ -146,14 +167,16 @@ #else #define CONFIG_BOOTCOMMAND "setenv bootcmd '" DEFAULT_BOOTCMD "';" \ "env import " xstr(CONFIG_BOOTCMD_MFG_LOADADDR) ";run bootcmd_mfg" -#if (defined(CONFIG_SOC_MX6SX) || defined(CONFIG_SOC_MX6SL) || defined(CONFIG_SOC_MX6UL)) +#if (defined(CONFIG_SOC_MX6SX) || defined(CONFIG_SOC_MX6SL) || \ + defined(CONFIG_BOARD_TX6UL)) #define CONFIG_BOOTCMD_MFG_LOADADDR 80500000 #else #define CONFIG_BOOTCMD_MFG_LOADADDR 10500000 #endif #define CONFIG_DELAY_ENVIRONMENT #endif /* CONFIG_TX6_UBOOT_MFG */ -#if (defined(CONFIG_SOC_MX6SX) || defined(CONFIG_SOC_MX6SL) || defined(CONFIG_SOC_MX6UL)) +#if (defined(CONFIG_SOC_MX6SX) || defined(CONFIG_SOC_MX6SL) || \ + defined(CONFIG_BOARD_TX6UL)) #define CONFIG_LOADADDR 82000000 #define CONFIG_FDTADDR 81000000 #else @@ -181,6 +204,7 @@ "mtdids=" MTDIDS_DEFAULT "\0" \ "mtdparts=" MTDPARTS_DEFAULT "\0" #else + #define CONFIG_SYS_CPU_CLK_STR xstr(CONFIG_SYS_MPU_CLK) #define CONFIG_EXTRA_ENV_SETTINGS \ @@ -213,7 +237,8 @@ EMMC_BOOT_PART_STR \ EMMC_BOOT_ACK_STR \ "fdtaddr=" xstr(CONFIG_FDTADDR) "\0" \ - CONFIG_SYS_FDTSAVE_CMD \ + FDT_HIGH_STR \ + FDTSAVE_CMD_STR \ "mtdids=" MTDIDS_DEFAULT "\0" \ "mtdparts=" MTDPARTS_DEFAULT "\0" \ "nfsroot=/tftpboot/rootfs\0" \ @@ -227,7 +252,7 @@ #define CONFIG_SYS_DEFAULT_BOOT_MODE "nand" #define CONFIG_SYS_BOOT_CMD_NAND \ "bootcmd_nand=setenv autostart no;run bootargs_ubifs;nboot linux\0" -#define CONFIG_SYS_FDTSAVE_CMD \ +#define FDTSAVE_CMD_STR \ "fdtsave=fdt resize;nand erase.part dtb" \ ";nand write ${fdtaddr} dtb ${fdtsize}\0" #define MTD_NAME "gpmi-nand" @@ -241,7 +266,7 @@ #define CONFIG_SYS_DEFAULT_BOOT_MODE "mmc" #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 #define CONFIG_SYS_BOOT_CMD_NAND "" -#define CONFIG_SYS_FDTSAVE_CMD \ +#define FDTSAVE_CMD_STR \ "fdtsave=mmc partconf 0 ${emmc_boot_ack} ${emmc_boot_part} ${emmc_boot_part}" \ ";mmc write ${fdtaddr} " xstr(CONFIG_SYS_DTB_BLKNO) " 80" \ ";mmc partconf 0 ${emmc_boot_ack} ${emmc_boot_part} 0\0" @@ -276,7 +301,7 @@ /* This is required for the FEC driver to work with cache enabled */ #define CONFIG_SYS_ARM_CACHE_WRITETHROUGH -#ifndef CONFIG_SOC_MX6UL +#ifndef CONFIG_BOARD_TX6UL #define CONFIG_FEC_MXC_PHYADDR 0 #define IMX_FEC_BASE ENET_BASE_ADDR #else @@ -295,25 +320,29 @@ #if defined(CONFIG_TX6_REV) #if CONFIG_TX6_REV == 0x1 #define CONFIG_LTC3676 -#elif CONFIG_TX6_REV == 0x2 -#define CONFIG_RN5T618 #elif CONFIG_TX6_REV == 0x3 #define CONFIG_RN5T567 #else #error Unsupported TX6 module revision #endif #else /* CONFIG_TX6_REV */ -/* autodetect which PMIC is present to derive TX6_REV */ -#ifdef CONFIG_SOC_MX6UL -#define CONFIG_SYS_I2C -#define CONFIG_SYS_I2C_SOFT +#ifdef CONFIG_BOARD_TX6UL +#ifdef CONFIG_SYS_I2C_SOFT +/* NOENV U-Boot is used for initial bootstrap. + * Since the TAMPER_PIN_DISABLE fuses have to be programmed + * to be able to use the TAMPER pins as GPIO to access the + * PMIC I2C bus, this is not possible on virgin hardware. + */ #define CONFIG_SYS_I2C_SOFT_SPEED 400000 +#define CONFIG_SYS_I2C_SPEED CONFIG_SYS_I2C_SOFT_SPEED #define CONFIG_SOFT_I2C_GPIO_SCL IMX_GPIO_NR(5, 0) #define CONFIG_SOFT_I2C_GPIO_SDA IMX_GPIO_NR(5, 1) #define CONFIG_SOFT_I2C_READ_REPEATED_START -#else +#endif /* CONFIG_SYS_I2C_SOFT */ +#else /* !CONFIG_BOARD_TX6UL */ +/* autodetect which PMIC is present to derive TX6_REV */ #define CONFIG_LTC3676 /* TX6_REV == 1 */ -#endif +#endif /* CONFIG_BOARD_TX6UL */ #define CONFIG_RN5T567 /* TX6_REV == 3 */ #endif /* CONFIG_TX6_REV */