X-Git-Url: https://git.karo-electronics.de/?a=blobdiff_plain;f=arch%2Farm%2Fboot%2Fdts%2Fimx6qdl.dtsi;h=9b03ac410a7a4b20cde263bec3f2bb8334a84674;hb=83d4ad3ed2e672822fea3a73d4713f819d8a45ce;hp=f6f6e7eee72e41633867835591c989981b7c91b2;hpb=e36152916e269a32b92d1fdd83b8bae1c6222bb2;p=karo-tx-linux.git diff --git a/arch/arm/boot/dts/imx6qdl.dtsi b/arch/arm/boot/dts/imx6qdl.dtsi index f6f6e7eee72e..9b03ac410a7a 100644 --- a/arch/arm/boot/dts/imx6qdl.dtsi +++ b/arch/arm/boot/dts/imx6qdl.dtsi @@ -647,6 +647,15 @@ MX6QDL_PAD_DISP0_DAT19__AUD5_RXD 0x80000000 >; }; + + pinctrl_audmux_5: audmux-5 { + fsl,pins = < + MX6QDL_PAD_KEY_ROW1__AUD5_RXD 0x80000000 + MX6QDL_PAD_KEY_ROW0__AUD5_TXD 0x80000000 + MX6QDL_PAD_KEY_COL0__AUD5_TXC 0x80000000 + MX6QDL_PAD_KEY_COL1__AUD5_TXFS 0x80000000 + >; + }; }; ecspi1 { @@ -739,6 +748,20 @@ MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN 0x1b0b0 >; }; + + pinctrl_enet_4: enetgrp-4 { + fsl,pins = < + MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 + MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 + MX6QDL_PAD_ENET_RXD0__ENET_RX_DATA0 0x1b0b0 + MX6QDL_PAD_ENET_RXD1__ENET_RX_DATA1 0x1b0b0 + MX6QDL_PAD_ENET_RX_ER__ENET_RX_ER 0x1b0b0 + MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN 0x1b0b0 + MX6QDL_PAD_ENET_TXD0__ENET_TX_DATA0 0x1b0b0 + MX6QDL_PAD_ENET_TXD1__ENET_TX_DATA1 0x1b0b0 + MX6QDL_PAD_ENET_CRS_DV__ENET_RX_EN 0x1b0b0 + >; + }; }; esai { @@ -786,6 +809,13 @@ MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x80000000 >; }; + + pinctrl_flexcan1_3: flexcan1grp-3 { + fsl,pins = < + MX6QDL_PAD_GPIO_7__FLEXCAN1_TX 0x80000000 + MX6QDL_PAD_GPIO_8__FLEXCAN1_RX 0x80000000 + >; + }; }; flexcan2 { @@ -1044,12 +1074,26 @@ }; }; - pwm0 { - pinctrl_pwm0_1: pwm0grp-1 { + pwm1 { + pinctrl_pwm1_1: pwm1grp-1 { fsl,pins = < MX6QDL_PAD_SD1_DAT3__PWM1_OUT 0x1b0b1 >; }; + + pinctrl_pwm1_2: pwm1grp-2 { + fsl,pins = < + MX6QDL_PAD_GPIO_9__PWM1_OUT 0x1b0b1 + >; + }; + }; + + pwm2 { + pinctrl_pwm2_1: pwm2grp-1 { + fsl,pins = < + MX6QDL_PAD_GPIO_1__PWM2_OUT 0x1b0b1 + >; + }; }; pwm3 { @@ -1120,6 +1164,13 @@ MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1 >; }; + + pinctrl_uart2_rtscts_3: uart2rtscts-3 { + fsl,pins = < + MX6QDL_PAD_SD4_DAT5__UART2_RTS_B 0x1b0b1 + MX6QDL_PAD_SD4_DAT6__UART2_CTS_B 0x1b0b1 + >; + }; }; uart3 { @@ -1188,6 +1239,15 @@ }; }; + usbh1 { + pinctrl_usbh1_1: usbh1grp-1 { + fsl,pins = < + MX6QDL_PAD_EIM_D31__USB_H1_PWR 0x40013030 + MX6QDL_PAD_EIM_D30__USB_H1_OC 0x40013030 + >; + }; + }; + usbh2 { pinctrl_usbh2_1: usbh2grp-1 { fsl,pins = <