X-Git-Url: https://git.karo-electronics.de/?a=blobdiff_plain;f=arch%2Farm%2Finclude%2Fasm%2Farch-mxs%2Fregs-bch.h;fp=arch%2Farm%2Finclude%2Fasm%2Farch-mx28%2Fregs-bch.h;h=287ea91768fa83c5fc0e3b2777f87135f86cdfee;hb=1e362dc3e799fd86722a60f5639e52a67dfc0658;hp=9243bdd1c03bf098d3c6eb5d264f83a7716b023c;hpb=c6c2a8263fc92e049a7fa90796baad34d4f273d3;p=karo-tx-uboot.git

diff --git a/arch/arm/include/asm/arch-mx28/regs-bch.h b/arch/arm/include/asm/arch-mxs/regs-bch.h
similarity index 92%
rename from arch/arm/include/asm/arch-mx28/regs-bch.h
rename to arch/arm/include/asm/arch-mxs/regs-bch.h
index 9243bdd1c0..287ea91768 100644
--- a/arch/arm/include/asm/arch-mx28/regs-bch.h
+++ b/arch/arm/include/asm/arch-mxs/regs-bch.h
@@ -29,34 +29,36 @@
 #include <asm/arch/regs-common.h>
 
 #ifndef	__ASSEMBLY__
-struct mx28_bch_regs {
-	mx28_reg_32(hw_bch_ctrl)
-	mx28_reg_32(hw_bch_status0)
-	mx28_reg_32(hw_bch_mode)
-	mx28_reg_32(hw_bch_encodeptr)
-	mx28_reg_32(hw_bch_dataptr)
-	mx28_reg_32(hw_bch_metaptr)
+struct bch_regs {
+	mxs_reg_32(hw_bch_ctrl)
+	mxs_reg_32(hw_bch_status0)
+	mxs_reg_32(hw_bch_mode)
+	mxs_reg_32(hw_bch_encodeptr)
+	mxs_reg_32(hw_bch_dataptr)
+	mxs_reg_32(hw_bch_metaptr)
 
 	uint32_t	reserved[4];
 
-	mx28_reg_32(hw_bch_layoutselect)
-	mx28_reg_32(hw_bch_flash0layout0)
-	mx28_reg_32(hw_bch_flash0layout1)
-	mx28_reg_32(hw_bch_flash1layout0)
-	mx28_reg_32(hw_bch_flash1layout1)
-	mx28_reg_32(hw_bch_flash2layout0)
-	mx28_reg_32(hw_bch_flash2layout1)
-	mx28_reg_32(hw_bch_flash3layout0)
-	mx28_reg_32(hw_bch_flash3layout1)
-	mx28_reg_32(hw_bch_dbgkesread)
-	mx28_reg_32(hw_bch_dbgcsferead)
-	mx28_reg_32(hw_bch_dbgsyndegread)
-	mx28_reg_32(hw_bch_dbgahbmread)
-	mx28_reg_32(hw_bch_blockname)
-	mx28_reg_32(hw_bch_version)
+	mxs_reg_32(hw_bch_layoutselect)
+	mxs_reg_32(hw_bch_flash0layout0)
+	mxs_reg_32(hw_bch_flash0layout1)
+	mxs_reg_32(hw_bch_flash1layout0)
+	mxs_reg_32(hw_bch_flash1layout1)
+	mxs_reg_32(hw_bch_flash2layout0)
+	mxs_reg_32(hw_bch_flash2layout1)
+	mxs_reg_32(hw_bch_flash3layout0)
+	mxs_reg_32(hw_bch_flash3layout1)
+	mxs_reg_32(hw_bch_dbgkesread)
+	mxs_reg_32(hw_bch_dbgcsferead)
+	mxs_reg_32(hw_bch_dbgsyndegread)
+	mxs_reg_32(hw_bch_dbgahbmread)
+	mxs_reg_32(hw_bch_blockname)
+	mxs_reg_32(hw_bch_version)
 };
 #endif
 
+#define BCH_BASE_ADDRESS				MXS_BCH_BASE
+
 #define	BCH_CTRL_SFTRST					(1 << 31)
 #define	BCH_CTRL_CLKGATE				(1 << 30)
 #define	BCH_CTRL_DEBUGSYNDROME				(1 << 22)