X-Git-Url: https://git.karo-electronics.de/?a=blobdiff_plain;f=arch%2Farm%2Finclude%2Fasm%2Farch-omap4%2Fclock.h;h=f3a682a19715675b0c5ad9ef202df7145d7dcc3c;hb=f0f102fde85aca438f4322893729f28135bf3c61;hp=d7b61c298a43d6d0291bc2689df7c446a373659a;hpb=f9b814a8e99390d19628bc1b67c9567fc485d918;p=karo-tx-uboot.git

diff --git a/arch/arm/include/asm/arch-omap4/clock.h b/arch/arm/include/asm/arch-omap4/clock.h
index d7b61c298a..f3a682a197 100644
--- a/arch/arm/include/asm/arch-omap4/clock.h
+++ b/arch/arm/include/asm/arch-omap4/clock.h
@@ -4,23 +4,7 @@
  *
  * Aneesh V <aneesh@ti.com>
  *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * SPDX-License-Identifier:	GPL-2.0+
  */
 #ifndef _CLOCKS_OMAP4_H_
 #define _CLOCKS_OMAP4_H_
@@ -76,7 +60,7 @@
 #define CM_CLKSEL_DCC_EN_MASK			(1 << 22)
 
 /* CM_SYS_CLKSEL */
-#define CM_SYS_CLKSEL_SYS_CLKSEL_MASK	7
+#define CM_SYS_CLKSEL_SYS_CLKSEL_MASK  7
 
 /* CM_CLKSEL_CORE */
 #define CLKSEL_CORE_SHIFT	0
@@ -165,11 +149,16 @@
 /* PRM_VC_VAL_BYPASS */
 #define PRM_VC_I2C_CHANNEL_FREQ_KHZ	400
 
-/* SMPS */
+/* PMIC */
 #define SMPS_I2C_SLAVE_ADDR	0x12
+/* TWL6030 SMPS */
 #define SMPS_REG_ADDR_VCORE1	0x55
 #define SMPS_REG_ADDR_VCORE2	0x5B
 #define SMPS_REG_ADDR_VCORE3	0x61
+/* TWL6032 SMPS */
+#define SMPS_REG_ADDR_SMPS1	0x55
+#define SMPS_REG_ADDR_SMPS2	0x5B
+#define SMPS_REG_ADDR_SMPS5	0x49
 
 #define PHOENIX_SMPS_BASE_VOLT_STD_MODE_UV		607700
 #define PHOENIX_SMPS_BASE_VOLT_STD_MODE_WITH_OFFSET_UV	709000