X-Git-Url: https://git.karo-electronics.de/?a=blobdiff_plain;f=arch%2Farm%2Finclude%2Fasm%2Farch-omap5%2Fclocks.h;h=5f1a7aa770dcf6e0c345be2dc86d9df97d49c61a;hb=3b97152b63da024e3547c76ac9f7912fceb876c3;hp=f32cf3eeef7beb8e79ef791b3945dc3155291087;hpb=8fa3d2b8161bb73b759c9db5c811c885ca5ec60c;p=karo-tx-uboot.git

diff --git a/arch/arm/include/asm/arch-omap5/clocks.h b/arch/arm/include/asm/arch-omap5/clocks.h
index f32cf3eeef..5f1a7aa770 100644
--- a/arch/arm/include/asm/arch-omap5/clocks.h
+++ b/arch/arm/include/asm/arch-omap5/clocks.h
@@ -480,6 +480,13 @@ struct omap5_prcm_regs {
 	u32 pad217[4];
 	u32 prm_vc_cfg_i2c_mode;		/* 4ae07bb4 */
 	u32 prm_vc_cfg_i2c_clk;			/* 4ae07bb8 */
+	u32 pad218[2];
+	u32 prm_sldo_core_setup;		/* 4ae07bc4 */
+	u32 prm_sldo_core_ctrl;			/* 4ae07bc8 */
+	u32 prm_sldo_mpu_setup;			/* 4ae07bcc */
+	u32 prm_sldo_mpu_ctrl;			/* 4ae07bd0 */
+	u32 prm_sldo_mm_setup;			/* 4ae07bd4 */
+	u32 prm_sldo_mm_ctrl;			/* 4ae07bd8 */
 };
 
 /* DPLL register offsets */
@@ -490,6 +497,11 @@ struct omap5_prcm_regs {
 
 #define DPLL_CLKOUT_DIV_MASK	0x1F /* post-divider mask */
 
+/* CM_DLL_CTRL */
+#define CM_DLL_CTRL_OVERRIDE_SHIFT		0
+#define CM_DLL_CTRL_OVERRIDE_MASK		(1 << 0)
+#define CM_DLL_CTRL_NO_OVERRIDE			0
+
 /* CM_CLKMODE_DPLL */
 #define CM_CLKMODE_DPLL_REGM4XEN_SHIFT		11
 #define CM_CLKMODE_DPLL_REGM4XEN_MASK		(1 << 11)
@@ -641,6 +653,9 @@ struct omap5_prcm_regs {
 #define VDD_MPU		1000
 #define VDD_MM		1000
 #define VDD_CORE	1040
+#define VDD_MPU_5432	1150
+#define VDD_MM_5432	1150
+#define VDD_CORE_5432	1150
 
 /* Standard offset is 0.5v expressed in uv */
 #define PALMAS_SMPS_BASE_VOLT_UV 500000