X-Git-Url: https://git.karo-electronics.de/?a=blobdiff_plain;f=arch%2Fmips%2Ftxx9%2Fjmr3927%2Firq.c;h=6ec626c9473fd4014a5c31919347d51aed407810;hb=e0dfb20c2b77c6626a24578240266ace928cd2e7;hp=070c9a115e57a559ba023015015ae40ba67ab9ea;hpb=14b395e35d1afdd8019d11b92e28041fad591b71;p=mv-sheeva.git diff --git a/arch/mips/txx9/jmr3927/irq.c b/arch/mips/txx9/jmr3927/irq.c index 070c9a115e5..6ec626c9473 100644 --- a/arch/mips/txx9/jmr3927/irq.c +++ b/arch/mips/txx9/jmr3927/irq.c @@ -30,15 +30,11 @@ * 675 Mass Ave, Cambridge, MA 02139, USA. */ #include -#include #include #include #include #include -#include - -#include #include #include @@ -46,13 +42,6 @@ #error JMR3927_IRQ_END > NR_IRQS #endif -static unsigned char irc_level[TX3927_NUM_IR] = { - 5, 5, 5, 5, 5, 5, /* INT[5:0] */ - 7, 7, /* SIO */ - 5, 5, 5, 0, 0, /* DMA, PIO, PCI */ - 6, 6, 6 /* TMR */ -}; - /* * CP0_STATUS is a thread's resource (saved/restored on context switch). * So disable_irq/enable_irq MUST handle IOC/IRC registers. @@ -103,26 +92,18 @@ static int jmr3927_irq_dispatch(int pending) return irq; } -#ifdef CONFIG_PCI -static irqreturn_t jmr3927_pcierr_interrupt(int irq, void *dev_id) -{ - printk(KERN_WARNING "PCI error interrupt (irq 0x%x).\n", irq); - printk(KERN_WARNING "pcistat:%02x, lbstat:%04lx\n", - tx3927_pcicptr->pcistat, tx3927_pcicptr->lbstat); - - return IRQ_HANDLED; -} -static struct irqaction pcierr_action = { - .handler = jmr3927_pcierr_interrupt, - .mask = CPU_MASK_NONE, - .name = "PCI error", +static struct irq_chip jmr3927_irq_ioc = { + .name = "jmr3927_ioc", + .ack = mask_irq_ioc, + .mask = mask_irq_ioc, + .mask_ack = mask_irq_ioc, + .unmask = unmask_irq_ioc, }; -#endif - -static void __init jmr3927_irq_init(void); void __init jmr3927_irq_setup(void) { + int i; + txx9_irq_dispatch = jmr3927_irq_dispatch; /* Now, interrupt control disabled, */ /* all IRC interrupts are masked, */ @@ -138,34 +119,10 @@ void __init jmr3927_irq_setup(void) /* clear PCI Reset interrupts */ jmr3927_ioc_reg_out(0, JMR3927_IOC_RESET_ADDR); - jmr3927_irq_init(); + tx3927_irq_init(); + for (i = JMR3927_IRQ_IOC; i < JMR3927_IRQ_IOC + JMR3927_NR_IRQ_IOC; i++) + set_irq_chip_and_handler(i, &jmr3927_irq_ioc, handle_level_irq); /* setup IOC interrupt 1 (PCI, MODEM) */ set_irq_chained_handler(JMR3927_IRQ_IOCINT, handle_simple_irq); - -#ifdef CONFIG_PCI - setup_irq(JMR3927_IRQ_IRC_PCI, &pcierr_action); -#endif - - /* enable all CPU interrupt bits. */ - set_c0_status(ST0_IM); /* IE bit is still 0. */ -} - -static struct irq_chip jmr3927_irq_ioc = { - .name = "jmr3927_ioc", - .ack = mask_irq_ioc, - .mask = mask_irq_ioc, - .mask_ack = mask_irq_ioc, - .unmask = unmask_irq_ioc, -}; - -static void __init jmr3927_irq_init(void) -{ - u32 i; - - txx9_irq_init(TX3927_IRC_REG); - for (i = 0; i < TXx9_MAX_IR; i++) - txx9_irq_set_pri(i, irc_level[i]); - for (i = JMR3927_IRQ_IOC; i < JMR3927_IRQ_IOC + JMR3927_NR_IRQ_IOC; i++) - set_irq_chip_and_handler(i, &jmr3927_irq_ioc, handle_level_irq); }