X-Git-Url: https://git.karo-electronics.de/?a=blobdiff_plain;f=arch%2Ftile%2Finclude%2Fasm%2Fcache.h;h=08a2815b5e4e7c9b6456b3c8c4d4d165bfc0db6c;hb=6d4121f6c20a0e86231d52f535f1c82423b3326f;hp=f6101840c9e73f7a3f8c7ea21b8f1f57e82f14b7;hpb=5e8530810805858892959b8ebbcec1009ea8c12d;p=mv-sheeva.git

diff --git a/arch/tile/include/asm/cache.h b/arch/tile/include/asm/cache.h
index f6101840c9e..08a2815b5e4 100644
--- a/arch/tile/include/asm/cache.h
+++ b/arch/tile/include/asm/cache.h
@@ -27,11 +27,10 @@
 #define L2_CACHE_ALIGN(x)	(((x)+(L2_CACHE_BYTES-1)) & -L2_CACHE_BYTES)
 
 /*
- * TILE-Gx is fully coherents so we don't need to define
- * ARCH_KMALLOC_MINALIGN.
+ * TILE-Gx is fully coherent so we don't need to define ARCH_DMA_MINALIGN.
  */
 #ifndef __tilegx__
-#define ARCH_KMALLOC_MINALIGN	L2_CACHE_BYTES
+#define ARCH_DMA_MINALIGN	L2_CACHE_BYTES
 #endif
 
 /* use the cache line size for the L2, which is where it counts */