X-Git-Url: https://git.karo-electronics.de/?a=blobdiff_plain;f=board%2Ffreescale%2Fmx28evk%2Fmx28evk.c;h=0f23c30f48564f4537ef7b08a9ff075e926f0fb4;hb=24ec4dbd5a59630f8d0ede2aad560d1336e31fdd;hp=867d3c8518fb1dbf3c7a9f07595c33ff92df457c;hpb=a6f0c4faa4c65a7b7048b12c9d180d7e1aad1721;p=karo-tx-uboot.git diff --git a/board/freescale/mx28evk/mx28evk.c b/board/freescale/mx28evk/mx28evk.c index 867d3c8518..0f23c30f48 100644 --- a/board/freescale/mx28evk/mx28evk.c +++ b/board/freescale/mx28evk/mx28evk.c @@ -9,18 +9,7 @@ * Copyright (C) 2011 Marek Vasut * on behalf of DENX Software Engineering GmbH * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. + * SPDX-License-Identifier: GPL-2.0+ */ #include @@ -43,22 +32,28 @@ DECLARE_GLOBAL_DATA_PTR; int board_early_init_f(void) { /* IO0 clock at 480MHz */ - mx28_set_ioclk(MXC_IOCLK0, 480000); + mxs_set_ioclk(MXC_IOCLK0, 480000); /* IO1 clock at 480MHz */ - mx28_set_ioclk(MXC_IOCLK1, 480000); + mxs_set_ioclk(MXC_IOCLK1, 480000); /* SSP0 clock at 96MHz */ - mx28_set_sspclk(MXC_SSPCLK0, 96000, 0); - /* SSP2 clock at 96MHz */ - mx28_set_sspclk(MXC_SSPCLK2, 96000, 0); + mxs_set_sspclk(MXC_SSPCLK0, 96000, 0); + /* SSP2 clock at 160MHz */ + mxs_set_sspclk(MXC_SSPCLK2, 160000, 0); #ifdef CONFIG_CMD_USB mxs_iomux_setup_pad(MX28_PAD_SSP2_SS1__USB1_OVERCURRENT); mxs_iomux_setup_pad(MX28_PAD_AUART2_RX__GPIO_3_8 | MXS_PAD_4MA | MXS_PAD_3V3 | MXS_PAD_NOPULL); - gpio_direction_output(MX28_PAD_AUART2_RX__GPIO_3_8, 1); + gpio_direction_output(MXS_PAD_TO_GPIO(MX28_PAD_AUART2_RX__GPIO_3_8), 1); #endif + /* Power on LCD */ + gpio_direction_output(MXS_PAD_TO_GPIO(MX28_PAD_LCD_RESET__GPIO_3_30), 1); + + /* Set contrast to maximum */ + gpio_direction_output(MXS_PAD_TO_GPIO(MX28_PAD_PWM2__GPIO_3_18), 1); + return 0; } @@ -83,36 +78,23 @@ static int mx28evk_mmc_wp(int id) return 1; } - return gpio_get_value(MX28_PAD_SSP1_SCK__GPIO_2_12); + return gpio_get_value(MXS_PAD_TO_GPIO(MX28_PAD_SSP1_SCK__GPIO_2_12)); } int board_mmc_init(bd_t *bis) { /* Configure WP as input */ - gpio_direction_input(MX28_PAD_SSP1_SCK__GPIO_2_12); + gpio_direction_input(MXS_PAD_TO_GPIO(MX28_PAD_SSP1_SCK__GPIO_2_12)); /* Configure MMC0 Power Enable */ - gpio_direction_output(MX28_PAD_PWM3__GPIO_3_28, 0); + gpio_direction_output(MXS_PAD_TO_GPIO(MX28_PAD_PWM3__GPIO_3_28), 0); - return mxsmmc_initialize(bis, 0, mx28evk_mmc_wp); + return mxsmmc_initialize(bis, 0, mx28evk_mmc_wp, NULL); } #endif #ifdef CONFIG_CMD_NET -#define MII_OPMODE_STRAP_OVERRIDE 0x16 -#define MII_PHY_CTRL1 0x1e -#define MII_PHY_CTRL2 0x1f - -int fecmxc_mii_postcall(int phy) -{ - miiphy_write("FEC1", phy, MII_BMCR, 0x9000); - miiphy_write("FEC1", phy, MII_OPMODE_STRAP_OVERRIDE, 0x0202); - if (phy == 3) - miiphy_write("FEC1", 3, MII_PHY_CTRL2, 0x8180); - return 0; -} - int board_eth_init(bd_t *bis) { struct mxs_clkctrl_regs *clkctrl_regs = @@ -121,18 +103,20 @@ int board_eth_init(bd_t *bis) int ret; ret = cpu_eth_init(bis); + if (ret) + return ret; /* MX28EVK uses ENET_CLK PAD to drive FEC clock */ writel(CLKCTRL_ENET_TIME_SEL_RMII_CLK | CLKCTRL_ENET_CLK_OUT_EN, - &clkctrl_regs->hw_clkctrl_enet); + &clkctrl_regs->hw_clkctrl_enet); /* Power-on FECs */ - gpio_direction_output(MX28_PAD_SSP1_DATA3__GPIO_2_15, 0); + gpio_direction_output(MXS_PAD_TO_GPIO(MX28_PAD_SSP1_DATA3__GPIO_2_15), 0); /* Reset FEC PHYs */ - gpio_direction_output(MX28_PAD_ENET0_RX_CLK__GPIO_4_13, 0); + gpio_direction_output(MXS_PAD_TO_GPIO(MX28_PAD_ENET0_RX_CLK__GPIO_4_13), 0); udelay(200); - gpio_set_value(MX28_PAD_ENET0_RX_CLK__GPIO_4_13, 1); + gpio_set_value(MXS_PAD_TO_GPIO(MX28_PAD_ENET0_RX_CLK__GPIO_4_13), 1); ret = fecmxc_initialize_multi(bis, 0, 0, MXS_ENET0_BASE); if (ret) { @@ -152,24 +136,12 @@ int board_eth_init(bd_t *bis) return -EINVAL; } - ret = fecmxc_register_mii_postcall(dev, fecmxc_mii_postcall); - if (ret) { - puts("FEC MXS: Unable to register FEC0 mii postcall\n"); - return ret; - } - dev = eth_get_dev_by_name("FEC1"); if (!dev) { puts("FEC MXS: Unable to get FEC1 device entry\n"); return -EINVAL; } - ret = fecmxc_register_mii_postcall(dev, fecmxc_mii_postcall); - if (ret) { - puts("FEC MXS: Unable to register FEC1 mii postcall\n"); - return ret; - } - return ret; }