X-Git-Url: https://git.karo-electronics.de/?a=blobdiff_plain;f=config%2FTX51-80x0.ecc;h=bb5b40cd35758505eeb34af9415c49ff3e22621e;hb=84d27734bc516723cef57f3f9564d1f54675cb4c;hp=399b07e996a8a624993213c3e1b31ac83ca3aae8;hpb=c84f75dd34288763b23bf4f6e08e150511175342;p=karo-tx-redboot.git

diff --git a/config/TX51-80x0.ecc b/config/TX51-80x0.ecc
index 399b07e9..bb5b40cd 100644
--- a/config/TX51-80x0.ecc
+++ b/config/TX51-80x0.ecc
@@ -794,6 +794,24 @@ cdl_option CYGPKG_DEVS_ETH_FEC_CFLAGS_ADD {
 };
 
 # <
+# MXC FEC MII Gasket for RMII mode
+# This option enables the use of the MII Gasket for
+# RMII mode found in i.MX25 and i.MX53 processors.
+#
+cdl_option CYGOPT_HAL_ARM_MXC_FEC_MIIGSK {
+    # This option is not active
+    # ActiveIf constraint: CYGPKG_HAL_ARM_MX25 || CYGPKG_HAL_ARM_MX53
+    #     CYGPKG_HAL_ARM_MX25 (unknown) == 0
+    #     CYGPKG_HAL_ARM_MX53 (unknown) == 0
+    #   --> 0
+
+    # Flavor: bool
+    # No user value, uncomment the following line to provide one.
+    # user_value 1
+    # value_source default
+    # Default value: 1
+};
+
 # <
 # Ethernet transceiver (PHY) support
 # API for ethernet PHY devices
@@ -2964,8 +2982,9 @@ cdl_option CYGHWR_HAL_ARM_CPU_FAMILY {
 #
 cdl_option CYGHWR_HAL_ARM_DUMP_EXCEPTIONS {
     # Flavor: bool
-    user_value 1
-    # value_source user
+    # No user value, uncomment the following line to provide one.
+    # user_value 0
+    # value_source default
     # Default value: 0
     # Requires: !CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS
     #     CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS == 0
@@ -3434,7 +3453,19 @@ cdl_option CYGNUM_HAL_ARM_TX51_SDRAM_SIZE {
     # user_value 0x08000000
     # value_source default
     # Default value: 0x08000000
-    # Legal values:  0x08000000 0x04000000 
+    # Legal values:  0x10000000 0x08000000 0x04000000 
+};
+
+# SDRAM clock
+# This option specifies the SDRAM clock im MHz of the TX51 module.
+#
+cdl_option CYGNUM_HAL_ARM_TX51_SDRAM_CLK {
+    # Flavor: data
+    # No user value, uncomment the following line to provide one.
+    # user_value 166
+    # value_source default
+    # Default value: 166
+    # Legal values:  166 200 
 };
 
 # Enable low level debugging with LED
@@ -5731,7 +5762,9 @@ cdl_option CYGSEM_REDBOOT_FIS_CRC_CHECK {
     # Flavor: bool
     # No user value, uncomment the following line to provide one.
     # user_value 1
-    # value_source default
+    # The inferred value should not be edited directly.
+    inferred_value 0
+    # value_source inferred
     # Default value: 1
 };