X-Git-Url: https://git.karo-electronics.de/?a=blobdiff_plain;f=doc%2FREADME.b4860qds;h=eada0c7dd89b55d7be39bc500c241dd491e6eaa4;hb=ba644d5124fc4f105696de87962138a646ec0208;hp=48ece4b835d6330d6d695ec80e14abd7278dbc52;hpb=3765b3e7bd0f8e46914d417f29cbcb0c72b1acf7;p=karo-tx-uboot.git diff --git a/doc/README.b4860qds b/doc/README.b4860qds index 48ece4b835..eada0c7dd8 100644 --- a/doc/README.b4860qds +++ b/doc/README.b4860qds @@ -227,17 +227,17 @@ Start Address End Address Description Size NOR Flash memory Map on B4860 and B4420QDS ------------------------------------------ Start End Definition Size -0xEFF80000 0xEFFFFFFF u-boot (current bank) 512KB -0xEFF60000 0xEFF7FFFF u-boot env (current bank) 128KB -0xEFF40000 0xEFF5FFFF FMAN Ucode (current bank) 128KB -0xEF300000 0xEFF3FFFF rootfs (alternate bank) 12MB + 256KB +0xEFF40000 0xEFFFFFFF u-boot (current bank) 768KB +0xEFF20000 0xEFF3FFFF u-boot env (current bank) 128KB +0xEFF00000 0xEFF1FFFF FMAN Ucode (current bank) 128KB +0xEF300000 0xEFEFFFFF rootfs (alternate bank) 12MB 0xEE800000 0xEE8FFFFF device tree (alternate bank) 1MB 0xEE020000 0xEE6FFFFF Linux.uImage (alternate bank) 6MB+896KB 0xEE000000 0xEE01FFFF RCW (alternate bank) 128KB -0xEDF80000 0xEDFFFFFF u-boot (alternate bank) 512KB -0xEDF60000 0xEDF7FFFF u-boot env (alternate bank) 128KB -0xEDF40000 0xEDF5FFFF FMAN ucode (alternate bank) 128KB -0xED300000 0xEDF3FFFF rootfs (current bank) 12MB+256MB +0xEDF40000 0xEDFFFFFF u-boot (alternate bank) 768KB +0xEDF20000 0xEDF3FFFF u-boot env (alternate bank) 128KB +0xEDF00000 0xEDF1FFFF FMAN ucode (alternate bank) 128KB +0xED300000 0xEDEFFFFF rootfs (current bank) 12MB 0xEC800000 0xEC8FFFFF device tree (current bank) 1MB 0xEC020000 0xEC6FFFFF Linux.uImage (current bank) 6MB+896KB 0xEC000000 0xEC01FFFF RCW (current bank) 128KB @@ -328,3 +328,39 @@ The below commands apply to both B4860QDS and B4420QDS. On Linux the interfaces are renamed as: . eth2 -> fm1-gb2 . eth3 -> fm1-gb3 + +NAND boot with 2 Stage boot loader +---------------------------------- +PBL initialise the internal SRAM and copy SPL(160KB) in SRAM. +SPL further initialise DDR using SPD and environment variables and copy +u-boot(768 KB) from flash to DDR. +Finally SPL transer control to u-boot for futher booting. + +SPL has following features: + - Executes within 256K + - No relocation required + + Run time view of SPL framework during boot :- + ----------------------------------------------- + Area | Address | +----------------------------------------------- + Secure boot | 0xFFFC0000 (32KB) | + headers | | + ----------------------------------------------- + GD, BD | 0xFFFC8000 (4KB) | + ----------------------------------------------- + ENV | 0xFFFC9000 (8KB) | + ----------------------------------------------- + HEAP | 0xFFFCB000 (30KB) | + ----------------------------------------------- + STACK | 0xFFFD8000 (22KB) | + ----------------------------------------------- + U-boot SPL | 0xFFFD8000 (160KB) | + ----------------------------------------------- + +NAND Flash memory Map on B4860 and B4420QDS +------------------------------------------ + Start End Definition Size +0x000000 0x0FFFFF u-boot 1MB +0x140000 0x15FFFF u-boot env 128KB +0x1A0000 0x1BFFFF FMAN Ucode 128KB