X-Git-Url: https://git.karo-electronics.de/?a=blobdiff_plain;f=include%2Fasm-mips%2Fmach-pb1x00%2Fpb1200.h;h=e2c6bcac3b4279933ed4b1419f92f35f972f4ddb;hb=fcbd3b4b92efe29b59df16b910138cf43683be88;hp=409d443322c1aab08baade0369c13980e91efc4f;hpb=51c83a946d5c8bc05eef7828197080f31fa33601;p=karo-tx-linux.git diff --git a/include/asm-mips/mach-pb1x00/pb1200.h b/include/asm-mips/mach-pb1x00/pb1200.h index 409d443322c1..e2c6bcac3b42 100644 --- a/include/asm-mips/mach-pb1x00/pb1200.h +++ b/include/asm-mips/mach-pb1x00/pb1200.h @@ -25,6 +25,7 @@ #define __ASM_PB1200_H #include +#include // This is defined in au1000.h with bogus value #undef AU1X00_EXTERNAL_INT @@ -181,15 +182,15 @@ static BCSR * const bcsr = (BCSR *)BCSR_KSEG1_ADDR; #define SET_VCC_VPP(VCC, VPP, SLOT)\ ((((VCC)<<2) | ((VPP)<<0)) << ((SLOT)*8)) -#define AU1XXX_SMC91111_PHYS_ADDR (0x0D000300) -#define AU1XXX_SMC91111_IRQ PB1200_ETH_INT +#define SMC91C111_PHYS_ADDR 0x0D000300 +#define SMC91C111_INT PB1200_ETH_INT -#define AU1XXX_ATA_PHYS_ADDR (0x0C800000) -#define AU1XXX_ATA_PHYS_LEN (0x100) -#define AU1XXX_ATA_REG_OFFSET (5) -#define AU1XXX_ATA_INT PB1200_IDE_INT -#define AU1XXX_ATA_DDMA_REQ DSCR_CMD0_DMA_REQ1; -#define AU1XXX_ATA_RQSIZE 128 +#define IDE_PHYS_ADDR 0x0C800000 +#define IDE_REG_SHIFT 5 +#define IDE_PHYS_LEN (16 << IDE_REG_SHIFT) +#define IDE_INT PB1200_IDE_INT +#define IDE_DDMA_REQ DSCR_CMD0_DMA_REQ1 +#define IDE_RQSIZE 128 #define NAND_PHYS_ADDR 0x1C000000 @@ -217,31 +218,35 @@ static BCSR * const bcsr = (BCSR *)BCSR_KSEG1_ADDR; /* - * External Interrupts for Pb1200 as of 8/6/2004. - * Bit positions in the CPLD registers can be calculated by taking - * the interrupt define and subtracting the PB1200_INT_BEGIN value. - * *example: IDE bis pos is = 64 - 64 - ETH bit pos is = 65 - 64 + * External Interrupts for Pb1200 as of 8/6/2004. + * Bit positions in the CPLD registers can be calculated by taking + * the interrupt define and subtracting the PB1200_INT_BEGIN value. + * + * Example: IDE bis pos is = 64 - 64 + * ETH bit pos is = 65 - 64 */ -#define PB1200_INT_BEGIN (AU1000_LAST_INTC1_INT + 1) -#define PB1200_IDE_INT (PB1200_INT_BEGIN + 0) -#define PB1200_ETH_INT (PB1200_INT_BEGIN + 1) -#define PB1200_PC0_INT (PB1200_INT_BEGIN + 2) -#define PB1200_PC0_STSCHG_INT (PB1200_INT_BEGIN + 3) -#define PB1200_PC1_INT (PB1200_INT_BEGIN + 4) -#define PB1200_PC1_STSCHG_INT (PB1200_INT_BEGIN + 5) -#define PB1200_DC_INT (PB1200_INT_BEGIN + 6) -#define PB1200_FLASHBUSY_INT (PB1200_INT_BEGIN + 7) -#define PB1200_PC0_INSERT_INT (PB1200_INT_BEGIN + 8) -#define PB1200_PC0_EJECT_INT (PB1200_INT_BEGIN + 9) -#define PB1200_PC1_INSERT_INT (PB1200_INT_BEGIN + 10) -#define PB1200_PC1_EJECT_INT (PB1200_INT_BEGIN + 11) -#define PB1200_SD0_INSERT_INT (PB1200_INT_BEGIN + 12) -#define PB1200_SD0_EJECT_INT (PB1200_INT_BEGIN + 13) -#define PB1200_SD1_INSERT_INT (PB1200_INT_BEGIN + 14) -#define PB1200_SD1_EJECT_INT (PB1200_INT_BEGIN + 15) - -#define PB1200_INT_END (PB1200_INT_BEGIN + 15) +enum external_pb1200_ints { + PB1200_INT_BEGIN = AU1000_MAX_INTR + 1, + + PB1200_IDE_INT = PB1200_INT_BEGIN, + PB1200_ETH_INT, + PB1200_PC0_INT, + PB1200_PC0_STSCHG_INT, + PB1200_PC1_INT, + PB1200_PC1_STSCHG_INT, + PB1200_DC_INT, + PB1200_FLASHBUSY_INT, + PB1200_PC0_INSERT_INT, + PB1200_PC0_EJECT_INT, + PB1200_PC1_INSERT_INT, + PB1200_PC1_EJECT_INT, + PB1200_SD0_INSERT_INT, + PB1200_SD0_EJECT_INT, + PB1200_SD1_INSERT_INT, + PB1200_SD1_EJECT_INT, + + PB1200_INT_END = PB1200_INT_BEGIN + 15 +}; /* For drivers/pcmcia/au1000_db1x00.c */ #define BOARD_PC0_INT PB1200_PC0_INT