X-Git-Url: https://git.karo-electronics.de/?a=blobdiff_plain;f=include%2Fconfigs%2Fsocfpga_common.h;h=e8473b872adf82438e82bf6ce6ae94cf8c59b1b2;hb=717626fd1cd3a9dd3de451405d97f67a7c707d89;hp=afe363c5368e40fd66d3129e0f34f6f84e90c09e;hpb=a6e7359181637f8186d1c1fe7acb442a263e8c40;p=karo-tx-uboot.git diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h index afe363c536..e8473b872a 100644 --- a/include/configs/socfpga_common.h +++ b/include/configs/socfpga_common.h @@ -13,14 +13,11 @@ #define CONFIG_SYS_THUMB_BUILD -#define CONFIG_SOCFPGA - /* * High level configuration */ #define CONFIG_DISPLAY_CPUINFO -#define CONFIG_DISPLAY_BOARDINFO -#define CONFIG_BOARD_EARLY_INIT_F +#define CONFIG_DISPLAY_BOARDINFO_LATE #define CONFIG_ARCH_EARLY_INIT_R #define CONFIG_SYS_NO_FLASH #define CONFIG_CLOCKS @@ -41,7 +38,7 @@ #define CONFIG_SYS_MEMTEST_END PHYS_SDRAM_1_SIZE #define CONFIG_SYS_INIT_RAM_ADDR 0xFFFF0000 -#define CONFIG_SYS_INIT_RAM_SIZE (0x10000 - 0x100) +#define CONFIG_SYS_INIT_RAM_SIZE (0x10000 - CONFIG_SYS_SPL_MALLOC_SIZE) #define CONFIG_SYS_INIT_SP_ADDR \ (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_SIZE - \ GENERATED_GBL_DATA_SIZE) @@ -84,7 +81,6 @@ #define CONFIG_CMD_SPI #define CONFIG_CMD_SF #define CONFIG_SF_DEFAULT_SPEED 30000000 -#define CONFIG_SPI_FLASH #define CONFIG_SPI_FLASH_STMICRO #define CONFIG_SPI_FLASH_BAR /* @@ -100,8 +96,6 @@ * Ethernet on SoC (EMAC) */ #if defined(CONFIG_CMD_NET) && !defined(CONFIG_SOCFPGA_VIRTUAL_TARGET) -#define CONFIG_DESIGNWARE_ETH -#define CONFIG_NET_MULTI #define CONFIG_DW_ALTDESCRIPTOR #define CONFIG_MII #define CONFIG_AUTONEG_TIMEOUT (15 * CONFIG_SYS_HZ) @@ -139,7 +133,7 @@ #define CONFIG_DESIGNWARE_WATCHDOG #define CONFIG_DW_WDT_BASE SOCFPGA_L4WD0_ADDRESS #define CONFIG_DW_WDT_CLOCK_KHZ 25000 -#define CONFIG_HW_WATCHDOG_TIMEOUT_MS 12000 +#define CONFIG_HW_WATCHDOG_TIMEOUT_MS 30000 #endif /* @@ -190,13 +184,8 @@ unsigned int cm_get_l4_sp_clk_hz(void); * QSPI support */ #ifdef CONFIG_OF_CONTROL /* QSPI is controlled via DT */ -#define CONFIG_CMD_DM -#define CONFIG_DM -#define CONFIG_DM_SPI -#define CONFIG_DM_SPI_FLASH #define CONFIG_CADENCE_QSPI /* Enable multiple SPI NOR flash manufacturers */ -#define CONFIG_SPI_FLASH /* SPI flash subsystem */ #define CONFIG_SPI_FLASH_STMICRO /* Micron/Numonyx flash */ #define CONFIG_SPI_FLASH_SPANSION /* Spansion flash */ #define CONFIG_SPI_FLASH_MTD @@ -210,14 +199,7 @@ unsigned int cm_get_qspi_controller_clk_hz(void); #endif #ifdef CONFIG_OF_CONTROL /* DW SPI is controlled via DT */ -#define CONFIG_CMD_DM -#define CONFIG_DM -#define CONFIG_DM_SPI #define CONFIG_DESIGNWARE_SPI -#ifndef __ASSEMBLY__ -unsigned int cm_get_spi_controller_clk_hz(void); -#define CONFIG_DW_SPI_REF_CLK cm_get_spi_controller_clk_hz() -#endif #define CONFIG_CMD_SPI #endif @@ -261,10 +243,10 @@ unsigned int cm_get_spi_controller_clk_hz(void); #define CONFIG_USB_GADGET_VBUS_DRAW 2 /* USB Composite download gadget - g_dnl */ -#define CONFIG_USBDOWNLOAD_GADGET -#define CONFIG_USB_GADGET_MASS_STORAGE +#define CONFIG_USB_GADGET_DOWNLOAD +#define CONFIG_USB_FUNCTION_MASS_STORAGE -#define CONFIG_DFU_FUNCTION +#define CONFIG_USB_FUNCTION_DFU #define CONFIG_DFU_MMC #define CONFIG_SYS_DFU_DATA_BUF_SIZE (32 * 1024 * 1024) #define DFU_DEFAULT_POLL_TIMEOUT 300 @@ -305,18 +287,24 @@ unsigned int cm_get_spi_controller_clk_hz(void); #define CONFIG_SPL_TEXT_BASE CONFIG_SYS_INIT_RAM_ADDR #define CONFIG_SYS_SPL_MALLOC_START CONFIG_SYS_INIT_SP_ADDR #define CONFIG_SYS_SPL_MALLOC_SIZE (5 * 1024) +#define CONFIG_SPL_MAX_SIZE (64 * 1024) #define CHUNKSZ_CRC32 (1 * 1024) /* FIXME: ewww */ #define CONFIG_CRC32_VERIFY /* Linker script for SPL */ -#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv7/socfpga/u-boot-spl.lds" +#define CONFIG_SPL_LDSCRIPT "arch/arm/mach-socfpga/u-boot-spl.lds" #define CONFIG_SPL_LIBCOMMON_SUPPORT #define CONFIG_SPL_LIBGENERIC_SUPPORT #define CONFIG_SPL_WATCHDOG_SUPPORT #define CONFIG_SPL_SERIAL_SUPPORT +/* + * Stack setup + */ +#define CONFIG_SPL_STACK CONFIG_SYS_INIT_SP_ADDR + #ifdef CONFIG_SPL_BUILD #undef CONFIG_PARTITIONS #endif