X-Git-Url: https://git.karo-electronics.de/?a=blobdiff_plain;f=include%2Ffsl_sec.h;h=800bd0ae656484aa344f1cc31743fd63b0393703;hb=28a05a91b1eeb1999aa8c4219e048b9bd13e0db3;hp=dbfae68ef42c8a5a4bb29773b822b5db4610bf9c;hpb=ff1213543f5380c6b3f8c3a01127037f77061487;p=karo-tx-uboot.git

diff --git a/include/fsl_sec.h b/include/fsl_sec.h
index dbfae68ef4..800bd0ae65 100644
--- a/include/fsl_sec.h
+++ b/include/fsl_sec.h
@@ -3,6 +3,7 @@
  *
  * Copyright 2014 Freescale Semiconductor, Inc.
  *
+ * SPDX-License-Identifier:	GPL-2.0+
  */
 
 #ifndef __FSL_SEC_H
@@ -32,10 +33,20 @@
 /* RNG4 TRNG test registers */
 struct rng4tst {
 #define RTMCTL_PRGM 0x00010000	/* 1 -> program mode, 0 -> run mode */
+#define RTMCTL_SAMP_MODE_VON_NEUMANN_ES_SC     0 /* use von Neumann data in
+						    both entropy shifter and
+						    statistical checker */
+#define RTMCTL_SAMP_MODE_RAW_ES_SC             1 /* use raw data in both
+						    entropy shifter and
+						    statistical checker */
+#define RTMCTL_SAMP_MODE_VON_NEUMANN_ES_RAW_SC 2 /* use von Neumann data in
+						    entropy shifter, raw data
+						    in statistical checker */
+#define RTMCTL_SAMP_MODE_INVALID               3 /* invalid combination */
 	u32 rtmctl;		/* misc. control register */
 	u32 rtscmisc;		/* statistical check misc. register */
 	u32 rtpkrrng;		/* poker range register */
-#define RTSDCTL_ENT_DLY_MIN	1200
+#define RTSDCTL_ENT_DLY_MIN	3200
 #define RTSDCTL_ENT_DLY_MAX	12800
 	union {
 		u32 rtpkrmax;	/* PRGM=1: poker max. limit register */
@@ -49,6 +60,7 @@ struct rng4tst {
 		u32 rttotsam;	/* PRGM=0: total samples register */
 	};
 	u32 rtfreqmin;		/* frequency count min. limit register */
+#define RTFRQMAX_DISABLE       (1 << 20)
 	union {
 		u32 rtfreqmax;	/* PRGM=1: freq. count max. limit register */
 		u32 rtfreqcnt;	/* PRGM=0: freq. count register */
@@ -135,7 +147,7 @@ typedef struct ccsr_sec {
 #define CONFIG_JRSTARTR_JR0		0x00000001
 
 struct jr_regs {
-#if defined(CONFIG_SYS_FSL_SEC_LE) && !defined(CONFIG_MX6)
+#if defined(CONFIG_SYS_FSL_SEC_LE) && !defined(CONFIG_SOC_MX6)
 	u32 irba_l;
 	u32 irba_h;
 #else
@@ -148,7 +160,7 @@ struct jr_regs {
 	u32 irsa;
 	u32 rsvd3;
 	u32 irja;
-#if defined(CONFIG_SYS_FSL_SEC_LE) && !defined(CONFIG_MX6)
+#if defined(CONFIG_SYS_FSL_SEC_LE) && !defined(CONFIG_SOC_MX6)
 	u32 orba_l;
 	u32 orba_h;
 #else
@@ -180,7 +192,7 @@ struct jr_regs {
  * related information
  */
 struct sg_entry {
-#ifdef defined(CONFIG_SYS_FSL_SEC_LE) && !defined(CONFIG_MX6)
+#if defined(CONFIG_SYS_FSL_SEC_LE) && !defined(CONFIG_SOC_MX6)
 	uint32_t addr_lo;	/* Memory Address - lo */
 	uint16_t addr_hi;	/* Memory Address of start of buffer - hi */
 	uint16_t reserved_zero;
@@ -201,7 +213,7 @@ struct sg_entry {
 #define SG_ENTRY_OFFSET_SHIFT	0
 };
 
-#ifdef CONFIG_MX6
+#ifdef CONFIG_SOC_MX6
 /* CAAM Job Ring 0 Registers */
 /* Secure Memory Partition Owner register */
 #define SMCSJR_PO		(3 << 6)