ENGR00221974 MX6SL-Fix system hang/crash issue in low power IDLE

ENGR00221974 MX6SL-Fix system hang/crash issue in low power IDLE

Ensure that the pull-up is enabled when the DQS line of LPDDR2
is floated when DDR freq is dropped to 24MHz. This is required
else its possible that the DDR will latch incorrect data when it
exits self-refresh.
CKE line should not be floated as it may cause DDR to incorrectly
exit self-refresh mode.

Also add 25 nops after the code that removes DDR from self-refresh.
We need this to ensure that the prefetcher block in A9 does not
access any instruction from DDR before the DDR exits self-refresh.
The A9 prefetch depth is about 23, hence 25 nops.

Signed-off-by: Ranjani Vaidyanathan <ra5478@freescale.com>