If RS-485 is enabled, make the OMAP UART fire THR interrupts when both
TX FIFO and TX shift register are empty instead of polling the
equivalent status bit. This removes the burst of interrupt requests
seen at every end of transmission.
Also: the comment said that the TX FIFO trigger level was set at 16
characters when it's 32 in reality.
Signed-off-by: Philippe Proulx <philippe.proulx@savoirfairelinux.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>