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AsoC: Intel: Add quirks for MinnowBoard MAX
authorIrina Tirdea <irina.tirdea@intel.com>
Fri, 12 Aug 2016 21:27:58 +0000 (16:27 -0500)
committerMark Brown <broonie@kernel.org>
Mon, 15 Aug 2016 14:14:57 +0000 (15:14 +0100)
commit0565e773c272038dc917dde9ed3fb53f72692685
treed80f7fd57c704c87ade1beafc95c313eca32658dtree | snapshot
parentdf1a2776a795848f4dbc7c0cb396158b43eb8aa3commit | diff
AsoC: Intel: Add quirks for MinnowBoard MAX

I2S MCLK has been routed to LSE connector on the MinnowBoard
starting with HW version 3. Older versions of the board do
not have MCLK wired.

Add dmi quirk to disable MCLK for MinnowBoard MAX (v2).

Signed-off-by: Irina Tirdea <irina.tirdea@intel.com>
Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
sound/soc/intel/boards/bytcr_rt5640.c diff | blob | history
Linux kernel for KaRo TX COM modules