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(parent: 4d2437b) | patch
cciss: add half second delay to PCI PM reset code
authorMike Miller <mike.miller@hp.com>
Wed, 5 Oct 2011 00:42:41 +0000 (11:42 +1100)
committerStephen Rothwell <sfr@canb.auug.org.au>
Thu, 13 Oct 2011 06:49:15 +0000 (17:49 +1100)
commit061e6b7e5d22abe2e65d0dd1b6c7d817d377562b
tree0b6541dccbcb5aee19102d9ea71746e574012629tree | snapshot
parent4d2437b4f5c3dd2b12241b8813a63b2faa5db1ffcommit | diff
cciss: add half second delay to PCI PM reset code

After using PCI Power Management to reset the Smart Array in kdump kernels
we need some delay.  Otherwise we may think the board failed to reset and
bail out.  This affects all users with a Smart Array P600.

Signed-off-by: Mike Miller <mike.miller@hp.com>
Cc: Jens Axboe <axboe@kernel.dk>
Signed-off-by: Andrew Morton <akpm@google.com>
drivers/block/cciss.c diff | blob | history
Linux kernel for KaRo TX COM modules