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ENGR00222835 MX6x-Fix incorrect enabling/disabling of PLL1
authorRanjani Vaidyanathan <ra5478@freescale.com>
Sun, 2 Sep 2012 02:31:02 +0000 (21:31 -0500)
committerLothar Waßmann <LW@KARO-electronics.de>
Fri, 24 May 2013 06:35:21 +0000 (08:35 +0200)
commit06fc75bff02a11502fd3c9fbfd3b8932f0dbca94
tree8429275e3a43919d65b79152ff24b4fdc81dc746tree | snapshot
parent302b519f56afc54d4c9670e77ccad8ff9d48ff5acommit | diff
ENGR00222835 MX6x-Fix incorrect enabling/disabling of PLL1

PLL1 was enabled without incrementing the usecount, and was
thus not getting disabled under certain conditions.
This causes 2 issues:
1. Increases the power.
2. Causes crashes on MX6SL in audio mode as ARM is switched
to PLL1 assuming its in bypass when entering WAIT mode. But PLL1
is enabled and not in bypass state.

Signed-off-by: Ranjani Vaidyanathan <ra5478@freescale.com>
arch/arm/mach-mx6/clock.c diff | blob | history
arch/arm/mach-mx6/clock_mx6sl.c diff | blob | history
Linux kernel for KaRo TX COM modules