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(parent: 60a762b) | patch
[IA64] improve flush_icache_range()
authorZoltan Menyhart <Zoltan.Menyhart@bull.net>
Fri, 3 Jun 2005 12:36:00 +0000 (05:36 -0700)
committerTony Luck <tony.luck@intel.com>
Tue, 12 Jul 2005 22:33:18 +0000 (15:33 -0700)
commit08357f82d4decc48bbfd39ae30d5fe0754f7f576
treec8516a8f208e1cb253bd33f41857b0699104b130tree | snapshot
parent60a762b6a6dec17cc4339b60154902fd04c2f9f2commit | diff
[IA64] improve flush_icache_range()

Check with PAL to see what the i-cache line size is for
each level of the cache, and so use the correct stride
when flushing the cache.

Acked-by: David Mosberger
Signed-off-by: Tony Luck <tony.luck@intel.com>
arch/ia64/kernel/setup.c diff | blob | history
arch/ia64/lib/flush.S diff | blob | history
Beck SC1x5 Kernel