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ENGR00227241 mx6sl: clk: sdhc can not work at lp idle mode
authorRyan QIAN <b32804@freescale.com>
Mon, 8 Oct 2012 01:50:23 +0000 (09:50 +0800)
committerLothar Waßmann <LW@KARO-electronics.de>
Fri, 24 May 2013 06:35:31 +0000 (08:35 +0200)
commit089e5c513771ca7df510c28d9ac015e1fd481519
tree7cd62929f7669d7b74ddec57247113f3c4e95207tree | snapshot
parente459d131b6d4cfb393464831c8f34dda15e9be7bcommit | diff
ENGR00227241 mx6sl: clk: sdhc can not work at lp idle mode

issue:
Once entering low power idle mode, pll2_400 will be bypass which will change
the clk rate of sdhc root clk. so far, there's no mechanism to inform sdhc
for changing of root clk in current driver structure.

fix:
Revert "ENGR00226096 mx6sl: remove high set point for usdhc"

This reverts commit 97aee96a34ca63da0d1d602a19b3a444352e5803.

Acked-by: Robby CAI <r63905@freescale.com>
Signed-off-by: Ryan QIAN <b32804@freescale.com>
arch/arm/mach-mx6/clock_mx6sl.c diff | blob | history
Linux kernel for KaRo TX COM modules