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MIPS: features: Add initial support for Segmentation Control registers
authorSteven J. Hill <Steven.Hill@imgtec.com>
Thu, 14 Nov 2013 16:12:24 +0000 (16:12 +0000)
committerJohn Crispin <blogic@openwrt.org>
Tue, 14 Jan 2014 11:48:27 +0000 (12:48 +0100)
commit0a2938f5379f7977a516eef5cead291bdb41abe4
tree64fdb3b574da97af4460cd233202d6985e072075tree | snapshot
parentfac2df2695a6e849600ce22172ea2ceaf2d56ec7commit | diff
MIPS: features: Add initial support for Segmentation Control registers

MIPS32R3 introduced a new set of Segmentation Control registers which
increase the flexibility of the segmented-based memory scheme.

Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com>
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Acked-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6131/
arch/mips/include/asm/cpu-features.h diff | blob | history
arch/mips/include/asm/cpu.h diff | blob | history
arch/mips/include/asm/mipsregs.h diff | blob | history
arch/mips/kernel/cpu-probe.c diff | blob | history
Linux kernel for KaRo TX COM modules