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(parent: 17e9273) | patch
clk: tegra: pll: Add logic for SS
authorBill Huang <bilhuang@nvidia.com>
Thu, 18 Jun 2015 21:28:33 +0000 (17:28 -0400)
committerThierry Reding <treding@nvidia.com>
Thu, 17 Dec 2015 12:37:55 +0000 (13:37 +0100)
commit0ef9db6cf24dbb58118818e64198d9a030e4697e
treebb0b0cb78ca6f1c3ae91d3dded430beafbb696eftree | snapshot
parent17e9273a9e00a1fc8a64d6de3c7bb9e5020b1b73commit | diff
clk: tegra: pll: Add logic for SS

Add some logic for Spread Spectrum control. It is used in conjuncture
with SDM fractional dividers. SSC has to be disabled when we configure
the divider settings.

Signed-off-by: Bill Huang <bilhuang@nvidia.com>
Signed-off-by: Rhyland Klein <rklein@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
drivers/clk/tegra/clk-pll.c diff | blob | history
drivers/clk/tegra/clk.h diff | blob | history
Beck SC1x5 Kernel