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(parent: a43f6e0) | patch
drm/i915: refactor PCH_DPLL_SEL #defines
authorDaniel Vetter <daniel.vetter@ffwll.ch>
Wed, 5 Jun 2013 11:34:09 +0000 (13:34 +0200)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Mon, 10 Jun 2013 17:48:56 +0000 (19:48 +0200)
commit1188739757d0e78810de5fe83dbe0128f624b9e8
tree5058d0c6a7b5b3c8461bb74f62b7858d3e0c7ecbtree | snapshot
parenta43f6e0fd6219e806268d5fef67db722875393a0commit | diff
drm/i915: refactor PCH_DPLL_SEL #defines

The bits are evenly space, so we can cut down on two big switch
blocks. This also greatly simplifies the hw state readout which
follows in the next patch.

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/i915_reg.h diff | blob | history
drivers/gpu/drm/i915/intel_display.c diff | blob | history
Beck SC1x5 Kernel