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(parent: 44e7698) | patch
cciss: add half second delay to PCI PM reset code
authorMike Miller <mike.miller@hp.com>
Wed, 5 Oct 2011 00:42:41 +0000 (11:42 +1100)
committerStephen Rothwell <sfr@canb.auug.org.au>
Fri, 7 Oct 2011 06:06:29 +0000 (17:06 +1100)
commit15fc2c3c3a3c9880414d784b80b48f00e00072cc
tree2f4ae7599c70a688bb89aad273f08d0b6f85dfc8tree | snapshot
parent44e7698e833b6caf9cc831e9ffb80b92c212aa28commit | diff
cciss: add half second delay to PCI PM reset code

After using PCI Power Management to reset the Smart Array in kdump kernels
we need some delay.  Otherwise we may think the board failed to reset and
bail out.  This affects all users with a Smart Array P600.

Signed-off-by: Mike Miller <mike.miller@hp.com>
Cc: Jens Axboe <axboe@kernel.dk>
Signed-off-by: Andrew Morton <akpm@google.com>
drivers/block/cciss.c diff | blob | history
Linux kernel for KaRo TX COM modules