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(parent: 338f7eb) | patch
ARM: dts: lager: Enable SCIF_CLK frequency and pins
authorGeert Uytterhoeven <geert+renesas@glider.be>
Fri, 29 Jan 2016 10:17:22 +0000 (11:17 +0100)
committerSimon Horman <horms+renesas@verge.net.au>
Tue, 9 Feb 2016 18:43:26 +0000 (19:43 +0100)
commit1781460c9accb106b0887985754b63be1b4c63f8
treee90ed57204b638b043b3c91a36bc7fccbfe308a2tree | snapshot
parent338f7ebf46e184746e63bcb93b3e5dbee95564a3commit | diff
ARM: dts: lager: Enable SCIF_CLK frequency and pins

Add and enable the external crystal for the SCIF_CLK and its pinctrl, to
be used by the Baud Rate Generator for External Clock (BRG) on (H)SCIF.

This increases the range and accuracy of supported baud rates.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
arch/arm/boot/dts/r8a7790-lager.dts diff | blob | history
Beck SC1x5 Kernel