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(parent: a3f457d) | patch
clk: rockchip: fix incorrect aclk_emmc source gate bits on rk3399
authorXing Zheng <zhengxing@rock-chips.com>
Tue, 2 Aug 2016 07:19:58 +0000 (15:19 +0800)
committerHeiko Stuebner <heiko@sntech.de>
Fri, 12 Aug 2016 08:04:52 +0000 (10:04 +0200)
commit20c389e656a89e2302017bf3f499cb5a31a2a7ba
tree547dd387e73f0d74eb53cdc7c493f6fc8126aaf9tree | snapshot
parenta3f457d9636b3f5ae4fc6502cb0c95f60f5e342bcommit | diff
clk: rockchip: fix incorrect aclk_emmc source gate bits on rk3399

Dues to incorrect diagram, we need to fix incorrect bits for
(c/g)pll_aclk_emmc_src:
cpll_aclk_emmc_src --> G6[13]
gpll_aclk_emmc_src --> G6[12]

Fixes: 115510053e5e ("clk: rockchip: add clock controller for the RK3399")
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Reviewed-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
drivers/clk/rockchip/clk-rk3399.c diff | blob | history
Beck SC1x5 Kernel