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ENGR00209657 MX6SL-Initialise CPU_CLK and AHB_CLK to default rates.
authorRanjani Vaidyanathan <ra5478@freescale.com>
Thu, 17 May 2012 04:41:47 +0000 (23:41 -0500)
committerOliver Wendt <ow@karo-electronics.de>
Mon, 30 Sep 2013 12:11:51 +0000 (14:11 +0200)
commit249ca9b64bc9fe53e8eae4135f82a02e545a0e65
tree50b7377551f54d40adb97a789627ab7900f9f9b7tree | snapshot
parentdc5cb72ef819006c438a01a6718b01e2b3846064commit | diff
ENGR00209657 MX6SL-Initialise CPU_CLK and AHB_CLK to default rates.

Set CPU_CLK to be 1GHz at boot and ABH_CLK to be 132MHz.

Signed-off-by: Ranjani Vaidyanathan <ra5478@freescale.com>
arch/arm/mach-mx6/board-mx6sl_arm2.c diff | blob | history
arch/arm/mach-mx6/clock_mx6sl.c diff | blob | history
Linux kernel for KaRo TX COM modules