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dwcddr21mctl: Synopsys DWC DDR2/1 Memory Controller
authorMacpaul Lin <macpaul@andestech.com>
Mon, 26 Sep 2011 09:44:34 +0000 (17:44 +0800)
committerMacpaul Lin <macpaul@andestech.com>
Wed, 9 Nov 2011 08:35:27 +0000 (16:35 +0800)
commit2ba5b1d32433698a66c0548bbc9e0c867ab55be2
tree9e917a01a0175b490b8d5447543aa5fe5ae036fctree | snapshot
parent0f3864a966cc88ac90d8e403aa634254657d874dcommit | diff
dwcddr21mctl: Synopsys DWC DDR2/1 Memory Controller

Header definitions of Synopsys DWC DDR2/1 Memory Controller.

Signed-off-by: Macpaul Lin <macpaul@andestech.com>
include/synopsys/dwcddr21mctl.h [new file with mode: 0644] blob
UBoot for KaRo TX COM modules