]> git.karo-electronics.de Git - karo-tx-linux.git/commit
arch/x86/platform/uv: fix incorrect tlb flush all issue
authorAlex Shi <alex.shi@intel.com>
Fri, 28 Sep 2012 00:18:51 +0000 (10:18 +1000)
committerStephen Rothwell <sfr@canb.auug.org.au>
Wed, 10 Oct 2012 03:56:26 +0000 (14:56 +1100)
commit3aa97af91def8e53ff3bf552fa28d582f94e326b
tree5922fef1e4f48ce8f4b4c22fde739466dbb87dff
parent38da28240fd3a854641531222dc201919d759fb6
arch/x86/platform/uv: fix incorrect tlb flush all issue

The flush tlb optimization code has logical issue on UV platform.  It
doesn't flush the full range at all, since it simply ignores its 'end'
parameter (and hence also the "all" indicator) in uv_flush_tlb_others()
function.

Cliff's notes:

: I tested the patch on a UV.  It has the effect of either clearing 1 or all
: TLBs in a cpu.  I added some debugging to test for the cases when clearing
: all TLBs is overkill, and in practice it happens very seldom.

Reported-by: Jan Beulich <jbeulich@suse.com>
Signed-off-by: Alex Shi <alex.shi@intel.com>
Signed-off-by: Cliff Wickman <cpw@sgi.com>
Tested-by: Cliff Wickman <cpw@sgi.com>
Cc: Ingo Molnar <mingo@elte.hu>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: "H. Peter Anvin" <hpa@zytor.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
arch/x86/include/asm/uv/uv.h
arch/x86/platform/uv/tlb_uv.c