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(parent: b3aebf9) | patch
arch/tile: support <asm/cachectl.h> header for cacheflush() syscall
authorChris Metcalf <cmetcalf@tilera.com>
Thu, 29 Mar 2012 19:25:59 +0000 (15:25 -0400)
committerChris Metcalf <cmetcalf@tilera.com>
Fri, 30 Mar 2012 22:55:52 +0000 (18:55 -0400)
commit3c6b5ba0559deba7590b58508e0967db1af3baca
tree4d170f4fda45af03344b7bcd829b4d07fe12b23btree | snapshot
parentb3aebf9877dfb2420ccffff10a9a140afc0ba41acommit | diff
arch/tile: support <asm/cachectl.h> header for cacheflush() syscall

We already had a syscall that did some dcache flushing, but it was
not used in practice.  Make it MIPS compatible instead so it can
do both the DCACHE and ICACHE actions.  We have code that wants to
be able to use the ICACHE flush mode from userspace so this change
enables that.

Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
arch/tile/include/asm/Kbuild diff | blob | history
arch/tile/include/asm/cachectl.h [new file with mode: 0644] blob
arch/tile/include/asm/compat.h diff | blob | history
arch/tile/include/asm/syscalls.h diff | blob | history
arch/tile/include/asm/unistd.h diff | blob | history
arch/tile/kernel/sys.c diff | blob | history
Linux kernel for KaRo TX COM modules