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(parent: 02720de) | patch
cciss: add half second delay to PCI PM reset code
authorMike Miller <mike.miller@hp.com>
Wed, 5 Oct 2011 00:42:41 +0000 (11:42 +1100)
committerStephen Rothwell <sfr@canb.auug.org.au>
Fri, 14 Oct 2011 06:19:39 +0000 (17:19 +1100)
commit445c86972059ed9d3bb65868422093a8c08a58a9
tree88f4cea7f63bbc9d6ca7f5a1ea524ece62538c88tree | snapshot
parent02720de3ae305931f61228eed673cac05a02a330commit | diff
cciss: add half second delay to PCI PM reset code

After using PCI Power Management to reset the Smart Array in kdump kernels
we need some delay.  Otherwise we may think the board failed to reset and
bail out.  This affects all users with a Smart Array P600.

Signed-off-by: Mike Miller <mike.miller@hp.com>
Cc: Jens Axboe <axboe@kernel.dk>
Signed-off-by: Andrew Morton <akpm@google.com>
drivers/block/cciss.c diff | blob | history
Linux kernel for KaRo TX COM modules