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(parent: d364a77) | patch
clk: tegra124: Add PLL_M_UD and PLL_C_UD clocks
authorMikko Perttunen <mperttunen@nvidia.com>
Fri, 11 Jul 2014 14:18:29 +0000 (17:18 +0300)
committerPeter De Schrijver <pdeschrijver@nvidia.com>
Thu, 18 Sep 2014 10:57:12 +0000 (13:57 +0300)
commit4c495c204f794125db11e74bd61228901b0acaa7
treeabf4f4f7fe05c5748dc879749dd21b7f8ecc4393tree | snapshot
parentd364a77d02071355edbd5ee26c248b1ea75c653ccommit | diff
clk: tegra124: Add PLL_M_UD and PLL_C_UD clocks

These clocks are used as parents for some EMC timings.

Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
drivers/clk/tegra/clk-tegra124.c diff | blob | history
Linux kernel for KaRo TX COM modules