ENGR00159737 [Mx6]Add clock check for periph clk

ENGR00159737 [Mx6]Add clock check for periph clk

For lpddr2 board, current freq only support up to
400MHz, in this case, periph clk will set to 400M
in uboot, so in clock init, we need to check
whether the ddr clock is set to 400M, if yes, then
we should set periph clk parent to pll2_pfd_400M.

Signed-off-by: Anson Huang <b20788@freescale.com>